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Side by Side Diff: src/arm/assembler-arm-inl.h

Issue 344011: * Fix new snapshot code on ARM. (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: Created 11 years, 1 month ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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238 ASSERT(offset >= -4); 238 ASSERT(offset >= -4);
239 return pc + offset + 8; 239 return pc + offset + 8;
240 } 240 }
241 241
242 242
243 Address Assembler::target_address_at(Address pc) { 243 Address Assembler::target_address_at(Address pc) {
244 return Memory::Address_at(target_address_address_at(pc)); 244 return Memory::Address_at(target_address_address_at(pc));
245 } 245 }
246 246
247 247
248 void Assembler::set_target_at(Address constant_pool_entry,
249 Address target) {
250 Memory::Address_at(constant_pool_entry) = target;
251 }
252
253
248 void Assembler::set_target_address_at(Address pc, Address target) { 254 void Assembler::set_target_address_at(Address pc, Address target) {
249 Memory::Address_at(target_address_address_at(pc)) = target; 255 Memory::Address_at(target_address_address_at(pc)) = target;
250 // Intuitively, we would think it is necessary to flush the instruction cache 256 // Intuitively, we would think it is necessary to flush the instruction cache
251 // after patching a target address in the code as follows: 257 // after patching a target address in the code as follows:
252 // CPU::FlushICache(pc, sizeof(target)); 258 // CPU::FlushICache(pc, sizeof(target));
253 // However, on ARM, no instruction was actually patched by the assignment 259 // However, on ARM, no instruction was actually patched by the assignment
254 // above; the target address is not part of an instruction, it is patched in 260 // above; the target address is not part of an instruction, it is patched in
255 // the constant pool and is read via a data access; the instruction accessing 261 // the constant pool and is read via a data access; the instruction accessing
256 // this address in the constant pool remains unchanged. 262 // this address in the constant pool remains unchanged.
257 } 263 }
258 264
259 } } // namespace v8::internal 265 } } // namespace v8::internal
260 266
261 #endif // V8_ARM_ASSEMBLER_ARM_INL_H_ 267 #endif // V8_ARM_ASSEMBLER_ARM_INL_H_
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