Basis for cryptohome+power_SuspendResume stress test.

client/deps/fio/crc32c-intel.patch

Index: client/deps/fio/crc32c-intel.patch
diff --git a/client/deps/fio/crc32c-intel.patch b/client/deps/fio/crc32c-intel.patch
new file mode 100644
index 0000000000000000000000000000000000000000..86ad5a10b7d4dfe56a2f75854f9a54065f5dfb70
--- /dev/null
+++ b/client/deps/fio/crc32c-intel.patch
@@ -0,0 +1,39 @@
+--- crc/crc32c-intel.c	2010-08-27 09:04:13.000000000 +0200
++++ crc/crc32c-intel.c.new2	2010-09-17 15:04:28.000000000 +0200
+@@ -74,30 +74,12 @@
+ 	return crc;
+ }
+ 
+-static void do_cpuid(unsigned int *eax, unsigned int *ebx, unsigned int *ecx,
+-		     unsigned int *edx)
+-{
+-	int id = *eax;
+-
+-	asm("movl %4, %%eax;"
+-	    "cpuid;"
+-	    "movl %%eax, %0;"
+-	    "movl %%ebx, %1;"
+-	    "movl %%ecx, %2;"
+-	    "movl %%edx, %3;"
+-		: "=r" (*eax), "=r" (*ebx), "=r" (*ecx), "=r" (*edx)
+-		: "r" (id)
+-		: "eax", "ebx", "ecx", "edx");
+-}
+-
+-int crc32c_intel_works(void)
+-{
+-	unsigned int eax, ebx, ecx, edx;
+-
+-	eax = 1;
+-
+-	do_cpuid(&eax, &ebx, &ecx, &edx);
+-	return (ecx & (1 << 20)) != 0;
++int crc32c_intel_works(void) {
++  unsigned int _eax, _ebx, _ecx, _edx;
++  unsigned int op = 1;
++  asm ("cpuid" : "=a" (_eax), "=r" (_ebx), "=c" (_ecx), "=d" (_edx)
++       : "a" (op));
++  return (_ecx & (1 << 20)) != 0;
+ }
+ 
+ #endif /* ARCH_HAVE_SSE */