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| 1 // Copyright 2007-2008 the V8 project authors. All rights reserved. | 1 // Copyright 2007-2008 the V8 project authors. All rights reserved. |
| 2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
| 3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
| 4 // met: | 4 // met: |
| 5 // | 5 // |
| 6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
| 7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
| 8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
| 9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
| 10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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| 1187 } | 1187 } |
| 1188 } else { | 1188 } else { |
| 1189 UnimplementedInstruction(); | 1189 UnimplementedInstruction(); |
| 1190 } | 1190 } |
| 1191 break; | 1191 break; |
| 1192 | 1192 |
| 1193 case 0xFE: | 1193 case 0xFE: |
| 1194 { data++; | 1194 { data++; |
| 1195 int mod, regop, rm; | 1195 int mod, regop, rm; |
| 1196 get_modrm(*data, &mod, ®op, &rm); | 1196 get_modrm(*data, &mod, ®op, &rm); |
| 1197 if (mod == 3 && regop == ecx) { | 1197 if (regop == ecx) { |
| 1198 AppendToBuffer("dec_b %s", NameOfCPURegister(rm)); | 1198 AppendToBuffer("dec_b "); |
| 1199 data += PrintRightOperand(data); | |
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antonm
2010/09/23 19:23:09
shouldn't that be PrintRightByteOperand?
Vladislav Kaznacheev
2010/09/23 19:29:24
PrintRightByteOperand would print something like d
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| 1199 } else { | 1200 } else { |
| 1200 UnimplementedInstruction(); | 1201 UnimplementedInstruction(); |
| 1201 } | 1202 } |
| 1202 data++; | |
| 1203 } | 1203 } |
| 1204 break; | 1204 break; |
| 1205 | 1205 |
| 1206 case 0x68: | 1206 case 0x68: |
| 1207 AppendToBuffer("push 0x%x", *reinterpret_cast<int32_t*>(data+1)); | 1207 AppendToBuffer("push 0x%x", *reinterpret_cast<int32_t*>(data+1)); |
| 1208 data += 5; | 1208 data += 5; |
| 1209 break; | 1209 break; |
| 1210 | 1210 |
| 1211 case 0x6A: | 1211 case 0x6A: |
| 1212 AppendToBuffer("push 0x%x", *reinterpret_cast<int8_t*>(data + 1)); | 1212 AppendToBuffer("push 0x%x", *reinterpret_cast<int8_t*>(data + 1)); |
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| 1506 fprintf(f, " "); | 1506 fprintf(f, " "); |
| 1507 } | 1507 } |
| 1508 fprintf(f, " %s\n", buffer.start()); | 1508 fprintf(f, " %s\n", buffer.start()); |
| 1509 } | 1509 } |
| 1510 } | 1510 } |
| 1511 | 1511 |
| 1512 | 1512 |
| 1513 } // namespace disasm | 1513 } // namespace disasm |
| 1514 | 1514 |
| 1515 #endif // V8_TARGET_ARCH_IA32 | 1515 #endif // V8_TARGET_ARCH_IA32 |
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