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Issue 3367013: CHROMEOS: ath9k: fix power save race conditions (Closed) Base URL: ssh://gitrw.chromium.org/kernel.git
Patch Set: Created 10 years, 3 months ago
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1 /* 1 /*
2 * Copyright (c) 2008-2009 Atheros Communications Inc. 2 * Copyright (c) 2008-2009 Atheros Communications Inc.
3 * 3 *
4 * Permission to use, copy, modify, and/or distribute this software for any 4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above 5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies. 6 * copyright notice and this permission notice appear in all copies.
7 * 7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
(...skipping 1081 matching lines...)
1092 struct ieee80211_hdr *hdr; 1092 struct ieee80211_hdr *hdr;
1093 int retval; 1093 int retval;
1094 bool decrypt_error = false; 1094 bool decrypt_error = false;
1095 struct ath_rx_status rs; 1095 struct ath_rx_status rs;
1096 enum ath9k_rx_qtype qtype; 1096 enum ath9k_rx_qtype qtype;
1097 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA); 1097 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
1098 int dma_type; 1098 int dma_type;
1099 u8 rx_status_len = ah->caps.rx_status_len; 1099 u8 rx_status_len = ah->caps.rx_status_len;
1100 u64 tsf = 0; 1100 u64 tsf = 0;
1101 u32 tsf_lower = 0; 1101 u32 tsf_lower = 0;
1102 unsigned long flags;
1102 1103
1103 if (edma) 1104 if (edma)
1104 dma_type = DMA_BIDIRECTIONAL; 1105 dma_type = DMA_BIDIRECTIONAL;
1105 else 1106 else
1106 dma_type = DMA_FROM_DEVICE; 1107 dma_type = DMA_FROM_DEVICE;
1107 1108
1108 qtype = hp ? ATH9K_RX_QUEUE_HP : ATH9K_RX_QUEUE_LP; 1109 qtype = hp ? ATH9K_RX_QUEUE_HP : ATH9K_RX_QUEUE_LP;
1109 spin_lock_bh(&sc->rx.rxbuflock); 1110 spin_lock_bh(&sc->rx.rxbuflock);
1110 1111
1111 tsf = ath9k_hw_gettsf64(ah); 1112 tsf = ath9k_hw_gettsf64(ah);
(...skipping 88 matching lines...)
1200 * change the default rx antenna if rx diversity chooses the 1201 * change the default rx antenna if rx diversity chooses the
1201 * other antenna 3 times in a row. 1202 * other antenna 3 times in a row.
1202 */ 1203 */
1203 if (sc->rx.defant != rs.rs_antenna) { 1204 if (sc->rx.defant != rs.rs_antenna) {
1204 if (++sc->rx.rxotherant >= 3) 1205 if (++sc->rx.rxotherant >= 3)
1205 ath_setdefantenna(sc, rs.rs_antenna); 1206 ath_setdefantenna(sc, rs.rs_antenna);
1206 } else { 1207 } else {
1207 sc->rx.rxotherant = 0; 1208 sc->rx.rxotherant = 0;
1208 } 1209 }
1209 1210
1211 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1210 if (unlikely(ath9k_check_auto_sleep(sc) || 1212 if (unlikely(ath9k_check_auto_sleep(sc) ||
1211 (sc->ps_flags & (PS_WAIT_FOR_BEACON | 1213 (sc->ps_flags & (PS_WAIT_FOR_BEACON |
1212 PS_WAIT_FOR_CAB | 1214 PS_WAIT_FOR_CAB |
1213 PS_WAIT_FOR_PSPOLL_DATA)))) 1215 PS_WAIT_FOR_PSPOLL_DATA))))
1214 ath_rx_ps(sc, skb); 1216 ath_rx_ps(sc, skb);
1217 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1215 1218
1216 ath_rx_send_to_mac80211(hw, sc, skb, rxs); 1219 ath_rx_send_to_mac80211(hw, sc, skb, rxs);
1217 1220
1218 requeue: 1221 requeue:
1219 if (edma) { 1222 if (edma) {
1220 list_add_tail(&bf->list, &sc->rx.rxbuf); 1223 list_add_tail(&bf->list, &sc->rx.rxbuf);
1221 ath_rx_edma_buf_link(sc, qtype); 1224 ath_rx_edma_buf_link(sc, qtype);
1222 } else { 1225 } else {
1223 list_move_tail(&bf->list, &sc->rx.rxbuf); 1226 list_move_tail(&bf->list, &sc->rx.rxbuf);
1224 ath_rx_buf_link(sc, bf); 1227 ath_rx_buf_link(sc, bf);
1225 } 1228 }
1226 } while (1); 1229 } while (1);
1227 1230
1228 spin_unlock_bh(&sc->rx.rxbuflock); 1231 spin_unlock_bh(&sc->rx.rxbuflock);
1229 1232
1230 return 0; 1233 return 0;
1231 } 1234 }
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