Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(86)

Side by Side Diff: src/third_party/valgrind/valgrind.h

Issue 335028: Apply patch by Timur Iskhodzhanov to add valgrind notifications on... (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: Created 11 years, 1 month ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
« no previous file with comments | « no previous file | src/x64/cpu-x64.cc » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 /* -*- c -*- 1 /* -*- c -*-
2 ---------------------------------------------------------------- 2 ----------------------------------------------------------------
3 3
4 Notice that the following BSD-style license applies to this one 4 Notice that the following BSD-style license applies to this one
5 file (valgrind.h) only. The rest of Valgrind is licensed under the 5 file (valgrind.h) only. The rest of Valgrind is licensed under the
6 terms of the GNU General Public License, version 2, unless 6 terms of the GNU General Public License, version 2, unless
7 otherwise indicated. See the COPYING file in the source 7 otherwise indicated. See the COPYING file in the source
8 distribution for details. 8 distribution for details.
9 9
10 ---------------------------------------------------------------- 10 ----------------------------------------------------------------
(...skipping 56 matching lines...) Expand 10 before | Expand all | Expand 10 after
67 consumes very few (eg. 7) instructions, so the resulting performance 67 consumes very few (eg. 7) instructions, so the resulting performance
68 loss is negligible unless you plan to execute client requests 68 loss is negligible unless you plan to execute client requests
69 millions of times per second. Nevertheless, if that is still a 69 millions of times per second. Nevertheless, if that is still a
70 problem, you can compile with the NVALGRIND symbol defined (gcc 70 problem, you can compile with the NVALGRIND symbol defined (gcc
71 -DNVALGRIND) so that client requests are not even compiled in. */ 71 -DNVALGRIND) so that client requests are not even compiled in. */
72 72
73 #ifndef __VALGRIND_H 73 #ifndef __VALGRIND_H
74 #define __VALGRIND_H 74 #define __VALGRIND_H
75 75
76 #include <stdarg.h> 76 #include <stdarg.h>
77 #include <stdint.h>
77 78
78 /* Nb: this file might be included in a file compiled with -ansi. So 79 /* Nb: this file might be included in a file compiled with -ansi. So
79 we can't use C++ style "//" comments nor the "asm" keyword (instead 80 we can't use C++ style "//" comments nor the "asm" keyword (instead
80 use "__asm__"). */ 81 use "__asm__"). */
81 82
82 /* Derive some tags indicating what the target platform is. Note 83 /* Derive some tags indicating what the target platform is. Note
83 that in this file we're using the compiler's CPP symbols for 84 that in this file we're using the compiler's CPP symbols for
84 identifying architectures, which are different to the ones we use 85 identifying architectures, which are different to the ones we use
85 within the rest of Valgrind. Note, __powerpc__ is active for both 86 within the rest of Valgrind. Note, __powerpc__ is active for both
86 32 and 64-bit PPC, whereas __powerpc64__ is only active for the 87 32 and 64-bit PPC, whereas __powerpc64__ is only active for the
(...skipping 138 matching lines...) Expand 10 before | Expand all | Expand 10 after
225 /* call-noredir *%EAX */ \ 226 /* call-noredir *%EAX */ \
226 "xchgl %%edx,%%edx\n\t" 227 "xchgl %%edx,%%edx\n\t"
227 #endif /* PLAT_x86_linux */ 228 #endif /* PLAT_x86_linux */
228 229
229 /* ------------------------ amd64-linux ------------------------ */ 230 /* ------------------------ amd64-linux ------------------------ */
230 231
231 #if defined(PLAT_amd64_linux) 232 #if defined(PLAT_amd64_linux)
232 233
233 typedef 234 typedef
234 struct { 235 struct {
235 unsigned long long int nraddr; /* where's the code? */ 236 uint64_t nraddr; /* where's the code? */
236 } 237 }
237 OrigFn; 238 OrigFn;
238 239
239 #define __SPECIAL_INSTRUCTION_PREAMBLE \ 240 #define __SPECIAL_INSTRUCTION_PREAMBLE \
240 "rolq $3, %%rdi ; rolq $13, %%rdi\n\t" \ 241 "rolq $3, %%rdi ; rolq $13, %%rdi\n\t" \
241 "rolq $61, %%rdi ; rolq $51, %%rdi\n\t" 242 "rolq $61, %%rdi ; rolq $51, %%rdi\n\t"
242 243
243 #define VALGRIND_DO_CLIENT_REQUEST( \ 244 #define VALGRIND_DO_CLIENT_REQUEST( \
244 _zzq_rlval, _zzq_default, _zzq_request, \ 245 _zzq_rlval, _zzq_default, _zzq_request, \
245 _zzq_arg1, _zzq_arg2, _zzq_arg3, _zzq_arg4, _zzq_arg5) \ 246 _zzq_arg1, _zzq_arg2, _zzq_arg3, _zzq_arg4, _zzq_arg5) \
246 { volatile unsigned long long int _zzq_args[6]; \ 247 { volatile uint64_t _zzq_args[6]; \
247 volatile unsigned long long int _zzq_result; \ 248 volatile uint64_t _zzq_result; \
248 _zzq_args[0] = (unsigned long long int)(_zzq_request); \ 249 _zzq_args[0] = (uint64_t)(_zzq_request); \
249 _zzq_args[1] = (unsigned long long int)(_zzq_arg1); \ 250 _zzq_args[1] = (uint64_t)(_zzq_arg1); \
250 _zzq_args[2] = (unsigned long long int)(_zzq_arg2); \ 251 _zzq_args[2] = (uint64_t)(_zzq_arg2); \
251 _zzq_args[3] = (unsigned long long int)(_zzq_arg3); \ 252 _zzq_args[3] = (uint64_t)(_zzq_arg3); \
252 _zzq_args[4] = (unsigned long long int)(_zzq_arg4); \ 253 _zzq_args[4] = (uint64_t)(_zzq_arg4); \
253 _zzq_args[5] = (unsigned long long int)(_zzq_arg5); \ 254 _zzq_args[5] = (uint64_t)(_zzq_arg5); \
254 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ 255 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \
255 /* %RDX = client_request ( %RAX ) */ \ 256 /* %RDX = client_request ( %RAX ) */ \
256 "xchgq %%rbx,%%rbx" \ 257 "xchgq %%rbx,%%rbx" \
257 : "=d" (_zzq_result) \ 258 : "=d" (_zzq_result) \
258 : "a" (&_zzq_args[0]), "0" (_zzq_default) \ 259 : "a" (&_zzq_args[0]), "0" (_zzq_default) \
259 : "cc", "memory" \ 260 : "cc", "memory" \
260 ); \ 261 ); \
261 _zzq_rlval = _zzq_result; \ 262 _zzq_rlval = _zzq_result; \
262 } 263 }
263 264
264 #define VALGRIND_GET_NR_CONTEXT(_zzq_rlval) \ 265 #define VALGRIND_GET_NR_CONTEXT(_zzq_rlval) \
265 { volatile OrigFn* _zzq_orig = &(_zzq_rlval); \ 266 { volatile OrigFn* _zzq_orig = &(_zzq_rlval); \
266 volatile unsigned long long int __addr; \ 267 volatile uint64_t __addr; \
267 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ 268 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \
268 /* %RAX = guest_NRADDR */ \ 269 /* %RAX = guest_NRADDR */ \
269 "xchgq %%rcx,%%rcx" \ 270 "xchgq %%rcx,%%rcx" \
270 : "=a" (__addr) \ 271 : "=a" (__addr) \
271 : \ 272 : \
272 : "cc", "memory" \ 273 : "cc", "memory" \
273 ); \ 274 ); \
274 _zzq_orig->nraddr = __addr; \ 275 _zzq_orig->nraddr = __addr; \
275 } 276 }
276 277
(...skipping 62 matching lines...) Expand 10 before | Expand all | Expand 10 after
339 /* branch-and-link-to-noredir *%R11 */ \ 340 /* branch-and-link-to-noredir *%R11 */ \
340 "or 3,3,3\n\t" 341 "or 3,3,3\n\t"
341 #endif /* PLAT_ppc32_linux */ 342 #endif /* PLAT_ppc32_linux */
342 343
343 /* ------------------------ ppc64-linux ------------------------ */ 344 /* ------------------------ ppc64-linux ------------------------ */
344 345
345 #if defined(PLAT_ppc64_linux) 346 #if defined(PLAT_ppc64_linux)
346 347
347 typedef 348 typedef
348 struct { 349 struct {
349 unsigned long long int nraddr; /* where's the code? */ 350 uint64_t nraddr; /* where's the code? */
350 unsigned long long int r2; /* what tocptr do we need? */ 351 uint64_t r2; /* what tocptr do we need? */
351 } 352 }
352 OrigFn; 353 OrigFn;
353 354
354 #define __SPECIAL_INSTRUCTION_PREAMBLE \ 355 #define __SPECIAL_INSTRUCTION_PREAMBLE \
355 "rotldi 0,0,3 ; rotldi 0,0,13\n\t" \ 356 "rotldi 0,0,3 ; rotldi 0,0,13\n\t" \
356 "rotldi 0,0,61 ; rotldi 0,0,51\n\t" 357 "rotldi 0,0,61 ; rotldi 0,0,51\n\t"
357 358
358 #define VALGRIND_DO_CLIENT_REQUEST( \ 359 #define VALGRIND_DO_CLIENT_REQUEST( \
359 _zzq_rlval, _zzq_default, _zzq_request, \ 360 _zzq_rlval, _zzq_default, _zzq_request, \
360 _zzq_arg1, _zzq_arg2, _zzq_arg3, _zzq_arg4, _zzq_arg5) \ 361 _zzq_arg1, _zzq_arg2, _zzq_arg3, _zzq_arg4, _zzq_arg5) \
361 \ 362 \
362 { unsigned long long int _zzq_args[6]; \ 363 { uint64_t _zzq_args[6]; \
363 register unsigned long long int _zzq_result __asm__("r3"); \ 364 register uint64_t _zzq_result __asm__("r3"); \
364 register unsigned long long int* _zzq_ptr __asm__("r4"); \ 365 register uint64_t* _zzq_ptr __asm__("r4"); \
365 _zzq_args[0] = (unsigned long long int)(_zzq_request); \ 366 _zzq_args[0] = (uint64_t)(_zzq_request); \
366 _zzq_args[1] = (unsigned long long int)(_zzq_arg1); \ 367 _zzq_args[1] = (uint64_t)(_zzq_arg1); \
367 _zzq_args[2] = (unsigned long long int)(_zzq_arg2); \ 368 _zzq_args[2] = (uint64_t)(_zzq_arg2); \
368 _zzq_args[3] = (unsigned long long int)(_zzq_arg3); \ 369 _zzq_args[3] = (uint64_t)(_zzq_arg3); \
369 _zzq_args[4] = (unsigned long long int)(_zzq_arg4); \ 370 _zzq_args[4] = (uint64_t)(_zzq_arg4); \
370 _zzq_args[5] = (unsigned long long int)(_zzq_arg5); \ 371 _zzq_args[5] = (uint64_t)(_zzq_arg5); \
371 _zzq_ptr = _zzq_args; \ 372 _zzq_ptr = _zzq_args; \
372 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ 373 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \
373 /* %R3 = client_request ( %R4 ) */ \ 374 /* %R3 = client_request ( %R4 ) */ \
374 "or 1,1,1" \ 375 "or 1,1,1" \
375 : "=r" (_zzq_result) \ 376 : "=r" (_zzq_result) \
376 : "0" (_zzq_default), "r" (_zzq_ptr) \ 377 : "0" (_zzq_default), "r" (_zzq_ptr) \
377 : "cc", "memory"); \ 378 : "cc", "memory"); \
378 _zzq_rlval = _zzq_result; \ 379 _zzq_rlval = _zzq_result; \
379 } 380 }
380 381
381 #define VALGRIND_GET_NR_CONTEXT(_zzq_rlval) \ 382 #define VALGRIND_GET_NR_CONTEXT(_zzq_rlval) \
382 { volatile OrigFn* _zzq_orig = &(_zzq_rlval); \ 383 { volatile OrigFn* _zzq_orig = &(_zzq_rlval); \
383 register unsigned long long int __addr __asm__("r3"); \ 384 register uint64_t __addr __asm__("r3"); \
384 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ 385 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \
385 /* %R3 = guest_NRADDR */ \ 386 /* %R3 = guest_NRADDR */ \
386 "or 2,2,2" \ 387 "or 2,2,2" \
387 : "=r" (__addr) \ 388 : "=r" (__addr) \
388 : \ 389 : \
389 : "cc", "memory" \ 390 : "cc", "memory" \
390 ); \ 391 ); \
391 _zzq_orig->nraddr = __addr; \ 392 _zzq_orig->nraddr = __addr; \
392 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ 393 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \
393 /* %R3 = guest_NRADDR_GPR2 */ \ 394 /* %R3 = guest_NRADDR_GPR2 */ \
(...skipping 83 matching lines...) Expand 10 before | Expand all | Expand 10 after
477 "or 3,3,3\n\t" 478 "or 3,3,3\n\t"
478 479
479 #endif /* PLAT_ppc32_aix5 */ 480 #endif /* PLAT_ppc32_aix5 */
480 481
481 /* ------------------------ ppc64-aix5 ------------------------- */ 482 /* ------------------------ ppc64-aix5 ------------------------- */
482 483
483 #if defined(PLAT_ppc64_aix5) 484 #if defined(PLAT_ppc64_aix5)
484 485
485 typedef 486 typedef
486 struct { 487 struct {
487 unsigned long long int nraddr; /* where's the code? */ 488 uint64_t nraddr; /* where's the code? */
488 unsigned long long int r2; /* what tocptr do we need? */ 489 uint64_t r2; /* what tocptr do we need? */
489 } 490 }
490 OrigFn; 491 OrigFn;
491 492
492 #define __SPECIAL_INSTRUCTION_PREAMBLE \ 493 #define __SPECIAL_INSTRUCTION_PREAMBLE \
493 "rotldi 0,0,3 ; rotldi 0,0,13\n\t" \ 494 "rotldi 0,0,3 ; rotldi 0,0,13\n\t" \
494 "rotldi 0,0,61 ; rotldi 0,0,51\n\t" 495 "rotldi 0,0,61 ; rotldi 0,0,51\n\t"
495 496
496 #define VALGRIND_DO_CLIENT_REQUEST( \ 497 #define VALGRIND_DO_CLIENT_REQUEST( \
497 _zzq_rlval, _zzq_default, _zzq_request, \ 498 _zzq_rlval, _zzq_default, _zzq_request, \
498 _zzq_arg1, _zzq_arg2, _zzq_arg3, _zzq_arg4, _zzq_arg5) \ 499 _zzq_arg1, _zzq_arg2, _zzq_arg3, _zzq_arg4, _zzq_arg5) \
499 \ 500 \
500 { unsigned long long int _zzq_args[7]; \ 501 { uint64_t _zzq_args[7]; \
501 register unsigned long long int _zzq_result; \ 502 register uint64_t _zzq_result; \
502 register unsigned long long int* _zzq_ptr; \ 503 register uint64_t* _zzq_ptr; \
503 _zzq_args[0] = (unsigned int long long)(_zzq_request); \ 504 _zzq_args[0] = (unsigned int long long)(_zzq_request); \
504 _zzq_args[1] = (unsigned int long long)(_zzq_arg1); \ 505 _zzq_args[1] = (unsigned int long long)(_zzq_arg1); \
505 _zzq_args[2] = (unsigned int long long)(_zzq_arg2); \ 506 _zzq_args[2] = (unsigned int long long)(_zzq_arg2); \
506 _zzq_args[3] = (unsigned int long long)(_zzq_arg3); \ 507 _zzq_args[3] = (unsigned int long long)(_zzq_arg3); \
507 _zzq_args[4] = (unsigned int long long)(_zzq_arg4); \ 508 _zzq_args[4] = (unsigned int long long)(_zzq_arg4); \
508 _zzq_args[5] = (unsigned int long long)(_zzq_arg5); \ 509 _zzq_args[5] = (unsigned int long long)(_zzq_arg5); \
509 _zzq_args[6] = (unsigned int long long)(_zzq_default); \ 510 _zzq_args[6] = (unsigned int long long)(_zzq_default); \
510 _zzq_ptr = _zzq_args; \ 511 _zzq_ptr = _zzq_args; \
511 __asm__ volatile("mr 4,%1\n\t" \ 512 __asm__ volatile("mr 4,%1\n\t" \
512 "ld 3, 48(4)\n\t" \ 513 "ld 3, 48(4)\n\t" \
513 __SPECIAL_INSTRUCTION_PREAMBLE \ 514 __SPECIAL_INSTRUCTION_PREAMBLE \
514 /* %R3 = client_request ( %R4 ) */ \ 515 /* %R3 = client_request ( %R4 ) */ \
515 "or 1,1,1\n\t" \ 516 "or 1,1,1\n\t" \
516 "mr %0,3" \ 517 "mr %0,3" \
517 : "=b" (_zzq_result) \ 518 : "=b" (_zzq_result) \
518 : "b" (_zzq_ptr) \ 519 : "b" (_zzq_ptr) \
519 : "r3", "r4", "cc", "memory"); \ 520 : "r3", "r4", "cc", "memory"); \
520 _zzq_rlval = _zzq_result; \ 521 _zzq_rlval = _zzq_result; \
521 } 522 }
522 523
523 #define VALGRIND_GET_NR_CONTEXT(_zzq_rlval) \ 524 #define VALGRIND_GET_NR_CONTEXT(_zzq_rlval) \
524 { volatile OrigFn* _zzq_orig = &(_zzq_rlval); \ 525 { volatile OrigFn* _zzq_orig = &(_zzq_rlval); \
525 register unsigned long long int __addr; \ 526 register uint64_t __addr; \
526 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ 527 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \
527 /* %R3 = guest_NRADDR */ \ 528 /* %R3 = guest_NRADDR */ \
528 "or 2,2,2\n\t" \ 529 "or 2,2,2\n\t" \
529 "mr %0,3" \ 530 "mr %0,3" \
530 : "=b" (__addr) \ 531 : "=b" (__addr) \
531 : \ 532 : \
532 : "r3", "cc", "memory" \ 533 : "r3", "cc", "memory" \
533 ); \ 534 ); \
534 _zzq_orig->nraddr = __addr; \ 535 _zzq_orig->nraddr = __addr; \
535 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ 536 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \
(...skipping 3379 matching lines...) Expand 10 before | Expand all | Expand 10 after
3915 3916
3916 3917
3917 #undef PLAT_x86_linux 3918 #undef PLAT_x86_linux
3918 #undef PLAT_amd64_linux 3919 #undef PLAT_amd64_linux
3919 #undef PLAT_ppc32_linux 3920 #undef PLAT_ppc32_linux
3920 #undef PLAT_ppc64_linux 3921 #undef PLAT_ppc64_linux
3921 #undef PLAT_ppc32_aix5 3922 #undef PLAT_ppc32_aix5
3922 #undef PLAT_ppc64_aix5 3923 #undef PLAT_ppc64_aix5
3923 3924
3924 #endif /* __VALGRIND_H */ 3925 #endif /* __VALGRIND_H */
OLDNEW
« no previous file with comments | « no previous file | src/x64/cpu-x64.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698