| Index: src/ia32/assembler-ia32.cc
|
| diff --git a/src/ia32/assembler-ia32.cc b/src/ia32/assembler-ia32.cc
|
| index eef307d7ed2e45a5dc6e02172b3978e8c7f5bbce..8ea37800d36c0067f41c062426ace7597c7725ca 100644
|
| --- a/src/ia32/assembler-ia32.cc
|
| +++ b/src/ia32/assembler-ia32.cc
|
| @@ -2179,6 +2179,16 @@ void Assembler::sqrtsd(XMMRegister dst, XMMRegister src) {
|
| }
|
|
|
|
|
| +void Assembler::andpd(XMMRegister dst, const Operand& src) {
|
| + EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| + EMIT(0x66);
|
| + EMIT(0x0F);
|
| + EMIT(0x54);
|
| + emit_sse_operand(dst, src);
|
| +}
|
| +
|
| +
|
| void Assembler::ucomisd(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| @@ -2201,7 +2211,29 @@ void Assembler::movmskpd(Register dst, XMMRegister src) {
|
| }
|
|
|
|
|
| -void Assembler::movdqa(const Operand& dst, XMMRegister src ) {
|
| +void Assembler::cmpltsd(XMMRegister dst, XMMRegister src) {
|
| + ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| + EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| + EMIT(0xF2);
|
| + EMIT(0x0F);
|
| + EMIT(0xC2);
|
| + emit_sse_operand(dst, src);
|
| + EMIT(1); // LT == 1
|
| +}
|
| +
|
| +
|
| +void Assembler::movaps(XMMRegister dst, const Operand& src) {
|
| + ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| + EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| + EMIT(0x0F);
|
| + EMIT(0x28);
|
| + emit_sse_operand(dst, src);
|
| +}
|
| +
|
| +
|
| +void Assembler::movdqa(const Operand& dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| @@ -2358,6 +2390,19 @@ void Assembler::ptest(XMMRegister dst, XMMRegister src) {
|
| emit_sse_operand(dst, src);
|
| }
|
|
|
| +
|
| +void Assembler::psllq(XMMRegister reg, int8_t imm8) {
|
| + ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| + EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| + EMIT(0x66);
|
| + EMIT(0x0F);
|
| + EMIT(0x73);
|
| + emit_sse_operand(esi, reg); // esi == 6
|
| + EMIT(imm8);
|
| +}
|
| +
|
| +
|
| void Assembler::emit_sse_operand(XMMRegister reg, const Operand& adr) {
|
| Register ireg = { reg.code() };
|
| emit_operand(ireg, adr);
|
|
|