Chromium Code Reviews| Index: src/trusted/service_runtime/arch/x86_64/nacl_syscall.S |
| =================================================================== |
| --- src/trusted/service_runtime/arch/x86_64/nacl_syscall.S (revision 1067) |
| +++ src/trusted/service_runtime/arch/x86_64/nacl_syscall.S (working copy) |
| @@ -52,7 +52,12 @@ |
| xor %eax, %eax |
| mov %gs, %ax |
| shr $3, %eax |
| +#ifdef __PIC__ |
| + mov IDENTIFIER(nacl_user)@GOTPCREL(%rip), %edx |
|
Mark Seaborn
2010/02/15 14:45:49
I'm not sure if this is correct.
It might need an
|
| + lea 0(%edx,%eax,4), %edx |
| +#else |
| lea IDENTIFIER(nacl_user)(,%eax,4), %edx |
| +#endif |
| /* check NaClThreadContext in sel_rt.h for the offsets */ |
| movl 0(%edx), %edx |
| @@ -67,7 +72,12 @@ |
| * any registers having particular values. we will clear/discard |
| * caller-saved registers at system call return. |
| */ |
| +#ifdef __PIC__ |
| + mov IDENTIFIER(nacl_sys)@GOTPCREL(%rip), %edx |
| + lea 0(%edx,%eax,4), %edx |
| +#else |
| lea IDENTIFIER(nacl_sys)(,%eax,4), %edx |
| +#endif |
| mov 0(%edx), %edx |
| /* |
| * %cs and %ds already taken care of by NaCl_trampoline_seg_code |
| @@ -82,7 +92,11 @@ |
| mov %ecx, %ss /* disable intr */ |
| mov %rdx, %rsp |
| push %rax |
| +#ifdef __PIC__ |
| + call IDENTIFIER(NaClSyscallCSegHook)@PLT |
|
Mark Seaborn
2010/02/15 14:45:49
Calling via the PLT is not necessary to make this
|
| +#else |
| call IDENTIFIER(NaClSyscallCSegHook) |
| +#endif |
| /* |
| * If stack usage in the above code changes, modify initial %esp |
| * computation -- see nacl_switch_to_app.c:NaClStartThreadInApp. |