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Issue 330018: Generate more compact XOR on 64-bit architecture when using xor to zero out r... (Closed)

Created:
11 years, 1 month ago by fschneider
Modified:
9 years, 6 months ago
Reviewers:
William Hesse
CC:
v8-dev
Visibility:
Public.

Description

Generate more compact XOR on 64-bit architecture when using xor to zero out registers. When using xor to zero a 64-bit register, generate 32-bit instruction instead. (according to Intel 64-bit mode coding guidelines) previous code for zeroing RAX: xor rax, rax ==> new code for zeroing RAX: xor eax, eax The 32-bit operand form has the same semantics: It also zeroes the upper 32-bit of rax and its encoding uses 1 byte less. Committed: http://code.google.com/p/v8/source/detail?r=3132

Patch Set 1 #

Unified diffs Side-by-side diffs Delta from patch set Stats (+5 lines, -1 line) Patch
M src/x64/assembler-x64.h View 1 chunk +5 lines, -1 line 0 comments Download

Messages

Total messages: 2 (0 generated)
fschneider
This is a small optimization for x64. It saves 1 byte in encoding xor reg, ...
11 years, 1 month ago (2009-10-26 12:28:57 UTC) #1
William Hesse
11 years, 1 month ago (2009-10-26 13:44:40 UTC) #2
LGTM.

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