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Issue 3197010: Version 2.3.10... (Closed) Base URL: http://v8.googlecode.com/svn/trunk/
Patch Set: Created 10 years, 4 months ago
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1 // Copyright 2010 the V8 project authors. All rights reserved. 1 // Copyright 2010 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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720 pc_modified_ = true; 720 pc_modified_ = true;
721 } 721 }
722 registers_[reg] = value; 722 registers_[reg] = value;
723 } 723 }
724 724
725 725
726 // Get the register from the architecture state. This function does handle 726 // Get the register from the architecture state. This function does handle
727 // the special case of accessing the PC register. 727 // the special case of accessing the PC register.
728 int32_t Simulator::get_register(int reg) const { 728 int32_t Simulator::get_register(int reg) const {
729 ASSERT((reg >= 0) && (reg < num_registers)); 729 ASSERT((reg >= 0) && (reg < num_registers));
730 // Stupid code added to avoid bug in GCC.
731 // See: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43949
732 if (reg >= num_registers) return 0;
733 // End stupid code.
730 return registers_[reg] + ((reg == pc) ? Instr::kPCReadOffset : 0); 734 return registers_[reg] + ((reg == pc) ? Instr::kPCReadOffset : 0);
731 } 735 }
732 736
733 737
734 void Simulator::set_dw_register(int dreg, const int* dbl) { 738 void Simulator::set_dw_register(int dreg, const int* dbl) {
735 ASSERT((dreg >= 0) && (dreg < num_d_registers)); 739 ASSERT((dreg >= 0) && (dreg < num_d_registers));
736 registers_[dreg] = dbl[0]; 740 registers_[dreg] = dbl[0];
737 registers_[dreg + 1] = dbl[1]; 741 registers_[dreg + 1] = dbl[1];
738 } 742 }
739 743
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1371 } 1375 }
1372 case 2: { 1376 case 2: {
1373 // Print("db"); 1377 // Print("db");
1374 start_address = rn_val - (num_regs * 4); 1378 start_address = rn_val - (num_regs * 4);
1375 end_address = rn_val - 4; 1379 end_address = rn_val - 4;
1376 rn_val = start_address; 1380 rn_val = start_address;
1377 break; 1381 break;
1378 } 1382 }
1379 case 3: { 1383 case 3: {
1380 // Print("ib"); 1384 // Print("ib");
1381 UNIMPLEMENTED(); 1385 start_address = rn_val + 4;
1386 end_address = rn_val + (num_regs * 4);
1387 rn_val = end_address;
1382 break; 1388 break;
1383 } 1389 }
1384 default: { 1390 default: {
1385 UNREACHABLE(); 1391 UNREACHABLE();
1386 break; 1392 break;
1387 } 1393 }
1388 } 1394 }
1389 if (instr->HasW()) { 1395 if (instr->HasW()) {
1390 set_register(rn, rn_val); 1396 set_register(rn, rn_val);
1391 } 1397 }
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2819 uintptr_t address = *stack_slot; 2825 uintptr_t address = *stack_slot;
2820 set_register(sp, current_sp + sizeof(uintptr_t)); 2826 set_register(sp, current_sp + sizeof(uintptr_t));
2821 return address; 2827 return address;
2822 } 2828 }
2823 2829
2824 } } // namespace assembler::arm 2830 } } // namespace assembler::arm
2825 2831
2826 #endif // __arm__ 2832 #endif // __arm__
2827 2833
2828 #endif // V8_TARGET_ARCH_ARM 2834 #endif // V8_TARGET_ARCH_ARM
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