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Side by Side Diff: src/assembler-arm.h

Issue 3186: Refactor the enum RelocMode changing the naming scheme from lower case to... (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: '' Created 12 years, 3 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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291 }; 291 };
292 292
293 293
294 // ----------------------------------------------------------------------------- 294 // -----------------------------------------------------------------------------
295 // Machine instruction Operands 295 // Machine instruction Operands
296 296
297 // Class Operand represents a shifter operand in data processing instructions 297 // Class Operand represents a shifter operand in data processing instructions
298 class Operand BASE_EMBEDDED { 298 class Operand BASE_EMBEDDED {
299 public: 299 public:
300 // immediate 300 // immediate
301 INLINE(explicit Operand(int32_t immediate, RelocMode rmode = no_reloc)); 301 INLINE(explicit Operand(int32_t immediate,
302 RelocInfo::Mode rmode = RelocInfo::NONE));
302 INLINE(explicit Operand(const ExternalReference& f)); 303 INLINE(explicit Operand(const ExternalReference& f));
303 INLINE(explicit Operand(const char* s)); 304 INLINE(explicit Operand(const char* s));
304 INLINE(explicit Operand(Object** opp)); 305 INLINE(explicit Operand(Object** opp));
305 INLINE(explicit Operand(Context** cpp)); 306 INLINE(explicit Operand(Context** cpp));
306 explicit Operand(Handle<Object> handle); 307 explicit Operand(Handle<Object> handle);
307 INLINE(explicit Operand(Smi* value)); 308 INLINE(explicit Operand(Smi* value));
308 309
309 // rm 310 // rm
310 INLINE(explicit Operand(Register rm)); 311 INLINE(explicit Operand(Register rm));
311 312
312 // rm <shift_op> shift_imm 313 // rm <shift_op> shift_imm
313 explicit Operand(Register rm, ShiftOp shift_op, int shift_imm); 314 explicit Operand(Register rm, ShiftOp shift_op, int shift_imm);
314 315
315 // rm <shift_op> rs 316 // rm <shift_op> rs
316 explicit Operand(Register rm, ShiftOp shift_op, Register rs); 317 explicit Operand(Register rm, ShiftOp shift_op, Register rs);
317 318
318 // Return true if this is a register operand. 319 // Return true if this is a register operand.
319 INLINE(bool is_reg() const); 320 INLINE(bool is_reg() const);
320 321
321 Register rm() const { return rm_; } 322 Register rm() const { return rm_; }
322 323
323 private: 324 private:
324 Register rm_; 325 Register rm_;
325 Register rs_; 326 Register rs_;
326 ShiftOp shift_op_; 327 ShiftOp shift_op_;
327 int shift_imm_; // valid if rm_ != no_reg && rs_ == no_reg 328 int shift_imm_; // valid if rm_ != no_reg && rs_ == no_reg
328 int32_t imm32_; // valid if rm_ == no_reg 329 int32_t imm32_; // valid if rm_ == no_reg
329 RelocMode rmode_; 330 RelocInfo::Mode rmode_;
330 331
331 friend class Assembler; 332 friend class Assembler;
332 }; 333 };
333 334
334 335
335 // Class MemOperand represents a memory operand in load and store instructions 336 // Class MemOperand represents a memory operand in load and store instructions
336 class MemOperand BASE_EMBEDDED { 337 class MemOperand BASE_EMBEDDED {
337 public: 338 public:
338 // [rn +/- offset] Offset/NegOffset 339 // [rn +/- offset] Offset/NegOffset
339 // [rn +/- offset]! PreIndex/NegPreIndex 340 // [rn +/- offset]! PreIndex/NegPreIndex
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765 void addrmod4(Instr instr, Register rn, RegList rl); 766 void addrmod4(Instr instr, Register rn, RegList rl);
766 void addrmod5(Instr instr, CRegister crd, const MemOperand& x); 767 void addrmod5(Instr instr, CRegister crd, const MemOperand& x);
767 768
768 // Labels 769 // Labels
769 void print(Label* L); 770 void print(Label* L);
770 void bind_to(Label* L, int pos); 771 void bind_to(Label* L, int pos);
771 void link_to(Label* L, Label* appendix); 772 void link_to(Label* L, Label* appendix);
772 void next(Label* L); 773 void next(Label* L);
773 774
774 // Record reloc info for current pc_ 775 // Record reloc info for current pc_
775 void RecordRelocInfo(RelocMode rmode, intptr_t data = 0); 776 void RecordRelocInfo(RelocInfo::Mode rmode, intptr_t data = 0);
776 777
777 // Check if is time to emit a constant pool for pending reloc info entries 778 // Check if is time to emit a constant pool for pending reloc info entries
778 void CheckConstPool(bool force_emit, bool require_jump); 779 void CheckConstPool(bool force_emit, bool require_jump);
779 780
780 // Block the emission of the constant pool before pc_offset 781 // Block the emission of the constant pool before pc_offset
781 void BlockConstPoolBefore(int pc_offset) { 782 void BlockConstPoolBefore(int pc_offset) {
782 if (no_const_pool_before_ < pc_offset) no_const_pool_before_ = pc_offset; 783 if (no_const_pool_before_ < pc_offset) no_const_pool_before_ = pc_offset;
783 } 784 }
784 }; 785 };
785 786
786 } } // namespace v8::internal 787 } } // namespace v8::internal
787 788
788 #endif // V8_ASSEMBLER_ARM_H_ 789 #endif // V8_ASSEMBLER_ARM_H_
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