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Side by Side Diff: src/assembler-arm-inl.h

Issue 3186: Refactor the enum RelocMode changing the naming scheme from lower case to... (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: '' Created 12 years, 3 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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43 43
44 namespace v8 { namespace internal { 44 namespace v8 { namespace internal {
45 45
46 Condition NegateCondition(Condition cc) { 46 Condition NegateCondition(Condition cc) {
47 ASSERT(cc != al); 47 ASSERT(cc != al);
48 return static_cast<Condition>(cc ^ ne); 48 return static_cast<Condition>(cc ^ ne);
49 } 49 }
50 50
51 51
52 void RelocInfo::apply(int delta) { 52 void RelocInfo::apply(int delta) {
53 if (is_internal_reference(rmode_)) { 53 if (RelocInfo::IsInternalReference(rmode_)) {
54 // absolute code pointer inside code object moves with the code object. 54 // absolute code pointer inside code object moves with the code object.
55 int32_t* p = reinterpret_cast<int32_t*>(pc_); 55 int32_t* p = reinterpret_cast<int32_t*>(pc_);
56 *p += delta; // relocate entry 56 *p += delta; // relocate entry
57 } 57 }
58 // We do not use pc relative addressing on ARM, so there is 58 // We do not use pc relative addressing on ARM, so there is
59 // nothing else to do. 59 // nothing else to do.
60 } 60 }
61 61
62 62
63 Address RelocInfo::target_address() { 63 Address RelocInfo::target_address() {
64 ASSERT(is_code_target(rmode_)); 64 ASSERT(IsCodeTarget(rmode_));
65 return Assembler::target_address_at(pc_); 65 return Assembler::target_address_at(pc_);
66 } 66 }
67 67
68 68
69 void RelocInfo::set_target_address(Address target) { 69 void RelocInfo::set_target_address(Address target) {
70 ASSERT(is_code_target(rmode_)); 70 ASSERT(IsCodeTarget(rmode_));
71 Assembler::set_target_address_at(pc_, target); 71 Assembler::set_target_address_at(pc_, target);
72 } 72 }
73 73
74 74
75 Object* RelocInfo::target_object() { 75 Object* RelocInfo::target_object() {
76 ASSERT(is_code_target(rmode_) || rmode_ == embedded_object); 76 ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
77 return reinterpret_cast<Object*>(Assembler::target_address_at(pc_)); 77 return reinterpret_cast<Object*>(Assembler::target_address_at(pc_));
78 } 78 }
79 79
80 80
81 Object** RelocInfo::target_object_address() { 81 Object** RelocInfo::target_object_address() {
82 ASSERT(is_code_target(rmode_) || rmode_ == embedded_object); 82 ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
83 return reinterpret_cast<Object**>(Assembler::target_address_address_at(pc_)); 83 return reinterpret_cast<Object**>(Assembler::target_address_address_at(pc_));
84 } 84 }
85 85
86 86
87 void RelocInfo::set_target_object(Object* target) { 87 void RelocInfo::set_target_object(Object* target) {
88 ASSERT(is_code_target(rmode_) || rmode_ == embedded_object); 88 ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
89 Assembler::set_target_address_at(pc_, reinterpret_cast<Address>(target)); 89 Assembler::set_target_address_at(pc_, reinterpret_cast<Address>(target));
90 } 90 }
91 91
92 92
93 Address* RelocInfo::target_reference_address() { 93 Address* RelocInfo::target_reference_address() {
94 ASSERT(rmode_ == external_reference); 94 ASSERT(rmode_ == EXTERNAL_REFERENCE);
95 return reinterpret_cast<Address*>(pc_); 95 return reinterpret_cast<Address*>(pc_);
96 } 96 }
97 97
98 98
99 Address RelocInfo::call_address() { 99 Address RelocInfo::call_address() {
100 ASSERT(is_call_instruction()); 100 ASSERT(is_call_instruction());
101 UNIMPLEMENTED(); 101 UNIMPLEMENTED();
102 return NULL; 102 return NULL;
103 } 103 }
104 104
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128 UNIMPLEMENTED(); 128 UNIMPLEMENTED();
129 } 129 }
130 130
131 131
132 bool RelocInfo::is_call_instruction() { 132 bool RelocInfo::is_call_instruction() {
133 UNIMPLEMENTED(); 133 UNIMPLEMENTED();
134 return false; 134 return false;
135 } 135 }
136 136
137 137
138 Operand::Operand(int32_t immediate, RelocMode rmode) { 138 Operand::Operand(int32_t immediate, RelocInfo::Mode rmode) {
139 rm_ = no_reg; 139 rm_ = no_reg;
140 imm32_ = immediate; 140 imm32_ = immediate;
141 rmode_ = rmode; 141 rmode_ = rmode;
142 } 142 }
143 143
144 144
145 Operand::Operand(const char* s) { 145 Operand::Operand(const char* s) {
146 rm_ = no_reg; 146 rm_ = no_reg;
147 imm32_ = reinterpret_cast<int32_t>(s); 147 imm32_ = reinterpret_cast<int32_t>(s);
148 rmode_ = embedded_string; 148 rmode_ = RelocInfo::EMBEDDED_STRING;
149 } 149 }
150 150
151 151
152 Operand::Operand(const ExternalReference& f) { 152 Operand::Operand(const ExternalReference& f) {
153 rm_ = no_reg; 153 rm_ = no_reg;
154 imm32_ = reinterpret_cast<int32_t>(f.address()); 154 imm32_ = reinterpret_cast<int32_t>(f.address());
155 rmode_ = external_reference; 155 rmode_ = RelocInfo::EXTERNAL_REFERENCE;
156 } 156 }
157 157
158 158
159 Operand::Operand(Object** opp) { 159 Operand::Operand(Object** opp) {
160 rm_ = no_reg; 160 rm_ = no_reg;
161 imm32_ = reinterpret_cast<int32_t>(opp); 161 imm32_ = reinterpret_cast<int32_t>(opp);
162 rmode_ = no_reloc; 162 rmode_ = RelocInfo::NONE;
163 } 163 }
164 164
165 165
166 Operand::Operand(Context** cpp) { 166 Operand::Operand(Context** cpp) {
167 rm_ = no_reg; 167 rm_ = no_reg;
168 imm32_ = reinterpret_cast<int32_t>(cpp); 168 imm32_ = reinterpret_cast<int32_t>(cpp);
169 rmode_ = no_reloc; 169 rmode_ = RelocInfo::NONE;
170 } 170 }
171 171
172 172
173 Operand::Operand(Smi* value) { 173 Operand::Operand(Smi* value) {
174 rm_ = no_reg; 174 rm_ = no_reg;
175 imm32_ = reinterpret_cast<intptr_t>(value); 175 imm32_ = reinterpret_cast<intptr_t>(value);
176 rmode_ = no_reloc; 176 rmode_ = RelocInfo::NONE;
177 } 177 }
178 178
179 179
180 Operand::Operand(Register rm) { 180 Operand::Operand(Register rm) {
181 rm_ = rm; 181 rm_ = rm;
182 rs_ = no_reg; 182 rs_ = no_reg;
183 shift_op_ = LSL; 183 shift_op_ = LSL;
184 shift_imm_ = 0; 184 shift_imm_ = 0;
185 } 185 }
186 186
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234 // CPU::FlushICache(pc, sizeof(target)); 234 // CPU::FlushICache(pc, sizeof(target));
235 // However, on ARM, no instruction was actually patched by the assignment 235 // However, on ARM, no instruction was actually patched by the assignment
236 // above; the target address is not part of an instruction, it is patched in 236 // above; the target address is not part of an instruction, it is patched in
237 // the constant pool and is read via a data access; the instruction accessing 237 // the constant pool and is read via a data access; the instruction accessing
238 // this address in the constant pool remains unchanged. 238 // this address in the constant pool remains unchanged.
239 } 239 }
240 240
241 } } // namespace v8::internal 241 } } // namespace v8::internal
242 242
243 #endif // V8_ASSEMBLER_ARM_INL_H_ 243 #endif // V8_ASSEMBLER_ARM_INL_H_
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