| OLD | NEW |
| 1 /* This file is automatically generated */ | 1 /* This file is automatically generated */ |
| 2 | 2 |
| 3 struct s_tpm_extend_cmd{ | 3 struct s_tpm_extend_cmd{ |
| 4 uint8_t buffer[34]; | 4 uint8_t buffer[34]; |
| 5 uint16_t pcrNum; | 5 uint16_t pcrNum; |
| 6 uint16_t inDigest; | 6 uint16_t inDigest; |
| 7 } tpm_extend_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0x22, 0x0, 0x0, 0x0, 0x14, }, | 7 } tpm_extend_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0x22, 0x0, 0x0, 0x0, 0x14, }, |
| 8 10, 14, }; | 8 10, 14, }; |
| 9 | 9 |
| 10 struct s_tpm_getpermissions_cmd{ | 10 struct s_tpm_getpermissions_cmd{ |
| (...skipping 51 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 62 struct s_tpm_startup_cmd{ | 62 struct s_tpm_startup_cmd{ |
| 63 uint8_t buffer[12]; | 63 uint8_t buffer[12]; |
| 64 } tpm_startup_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x0, 0x0, 0x0, 0x99, 0x0, 0
x1, }, | 64 } tpm_startup_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x0, 0x0, 0x0, 0x99, 0x0, 0
x1, }, |
| 65 }; | 65 }; |
| 66 | 66 |
| 67 struct s_tpm_pplock_cmd{ | 67 struct s_tpm_pplock_cmd{ |
| 68 uint8_t buffer[12]; | 68 uint8_t buffer[12]; |
| 69 } tpm_pplock_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x40, 0x0, 0x0, 0xa, 0x0, 0x
4, }, | 69 } tpm_pplock_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x40, 0x0, 0x0, 0xa, 0x0, 0x
4, }, |
| 70 }; | 70 }; |
| 71 | 71 |
| 72 struct s_tpm_ppenable_cmd{ |
| 73 uint8_t buffer[12]; |
| 74 } tpm_ppenable_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x40, 0x0, 0x0, 0xa, 0x0,
0x20, }, |
| 75 }; |
| 76 |
| 72 struct s_tpm_ppassert_cmd{ | 77 struct s_tpm_ppassert_cmd{ |
| 73 uint8_t buffer[12]; | 78 uint8_t buffer[12]; |
| 74 } tpm_ppassert_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x40, 0x0, 0x0, 0xa, 0x0,
0x8, }, | 79 } tpm_ppassert_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x40, 0x0, 0x0, 0xa, 0x0,
0x8, }, |
| 75 }; | 80 }; |
| 76 | 81 |
| 77 struct s_tpm_nv_read_cmd{ | 82 struct s_tpm_nv_read_cmd{ |
| 78 uint8_t buffer[22]; | 83 uint8_t buffer[22]; |
| 79 uint16_t index; | 84 uint16_t index; |
| 80 uint16_t length; | 85 uint16_t length; |
| 81 } tpm_nv_read_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0x16, 0x0, 0x0, 0x0, 0xcf, }, | 86 } tpm_nv_read_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0x16, 0x0, 0x0, 0x0, 0xcf, }, |
| (...skipping 10 matching lines...) Expand all Loading... |
| 92 struct s_tpm_nv_definespace_cmd{ | 97 struct s_tpm_nv_definespace_cmd{ |
| 93 uint8_t buffer[101]; | 98 uint8_t buffer[101]; |
| 94 uint16_t index; | 99 uint16_t index; |
| 95 uint16_t perm; | 100 uint16_t perm; |
| 96 uint16_t size; | 101 uint16_t size; |
| 97 } tpm_nv_definespace_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0x65, 0x0, 0x0, 0x0, 0xcc
, 0x0, 0x18, 0, 0, 0, 0, 0x0, 0x3, 0, 0, 0, 0x1f, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0, 0x3, 0, 0, 0, 0x1f, 0, 0, 0, 0, 0, 0, 0, 0, 0
, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0, 0x17, }, | 102 } tpm_nv_definespace_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0x65, 0x0, 0x0, 0x0, 0xcc
, 0x0, 0x18, 0, 0, 0, 0, 0x0, 0x3, 0, 0, 0, 0x1f, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0, 0x3, 0, 0, 0, 0x1f, 0, 0, 0, 0, 0, 0, 0, 0, 0
, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0, 0x17, }, |
| 98 12, 70, 77, }; | 103 12, 70, 77, }; |
| 99 | 104 |
| 100 const int kWriteInfoLength = 12; | 105 const int kWriteInfoLength = 12; |
| 101 const int kNvDataPublicPermissionsOffset = 60; | 106 const int kNvDataPublicPermissionsOffset = 60; |
| OLD | NEW |