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1 // Copyright 2010 the V8 project authors. All rights reserved. | 1 // Copyright 2010 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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1048 DeferredInlineBinaryOperation(Token::Value op, | 1048 DeferredInlineBinaryOperation(Token::Value op, |
1049 Register dst, | 1049 Register dst, |
1050 Register left, | 1050 Register left, |
1051 Register right, | 1051 Register right, |
1052 TypeInfo left_info, | 1052 TypeInfo left_info, |
1053 TypeInfo right_info, | 1053 TypeInfo right_info, |
1054 OverwriteMode mode) | 1054 OverwriteMode mode) |
1055 : op_(op), dst_(dst), left_(left), right_(right), | 1055 : op_(op), dst_(dst), left_(left), right_(right), |
1056 left_info_(left_info), right_info_(right_info), mode_(mode) { | 1056 left_info_(left_info), right_info_(right_info), mode_(mode) { |
1057 set_comment("[ DeferredInlineBinaryOperation"); | 1057 set_comment("[ DeferredInlineBinaryOperation"); |
| 1058 ASSERT(!left.is(right)); |
1058 } | 1059 } |
1059 | 1060 |
1060 virtual void Generate(); | 1061 virtual void Generate(); |
1061 | 1062 |
1062 // This stub makes explicit calls to SaveRegisters(), RestoreRegisters() and | 1063 // This stub makes explicit calls to SaveRegisters(), RestoreRegisters() and |
1063 // Exit(). | 1064 // Exit(). |
1064 virtual bool AutoSaveAndRestore() { return false; } | 1065 virtual bool AutoSaveAndRestore() { return false; } |
1065 | 1066 |
1066 void JumpToAnswerOutOfRange(Condition cond); | 1067 void JumpToAnswerOutOfRange(Condition cond); |
1067 void JumpToConstantRhs(Condition cond, Smi* smi_value); | 1068 void JumpToConstantRhs(Condition cond, Smi* smi_value); |
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1837 } | 1838 } |
1838 ASSERT(remainder.is_register() && remainder.reg().is(edx)); | 1839 ASSERT(remainder.is_register() && remainder.reg().is(edx)); |
1839 ASSERT(!(left->is_register() && left->reg().is(edx))); | 1840 ASSERT(!(left->is_register() && left->reg().is(edx))); |
1840 ASSERT(!(right->is_register() && right->reg().is(edx))); | 1841 ASSERT(!(right->is_register() && right->reg().is(edx))); |
1841 | 1842 |
1842 left->ToRegister(); | 1843 left->ToRegister(); |
1843 right->ToRegister(); | 1844 right->ToRegister(); |
1844 frame_->Spill(eax); | 1845 frame_->Spill(eax); |
1845 frame_->Spill(edx); | 1846 frame_->Spill(edx); |
1846 // DeferredInlineBinaryOperation requires all the registers that it is | 1847 // DeferredInlineBinaryOperation requires all the registers that it is |
1847 // told about to be spilled. | 1848 // told about to be spilled and distinct. |
1848 frame_->Spill(left->reg()); | 1849 Result distinct_right = frame_->MakeDistinctAndSpilled(left, right); |
1849 frame_->Spill(right->reg()); | |
1850 | 1850 |
1851 // Check that left and right are smi tagged. | 1851 // Check that left and right are smi tagged. |
1852 DeferredInlineBinaryOperation* deferred = | 1852 DeferredInlineBinaryOperation* deferred = |
1853 new DeferredInlineBinaryOperation(op, | 1853 new DeferredInlineBinaryOperation(op, |
1854 (op == Token::DIV) ? eax : edx, | 1854 (op == Token::DIV) ? eax : edx, |
1855 left->reg(), | 1855 left->reg(), |
1856 right->reg(), | 1856 distinct_right.reg(), |
1857 left_type_info, | 1857 left_type_info, |
1858 right_type_info, | 1858 right_type_info, |
1859 overwrite_mode); | 1859 overwrite_mode); |
1860 JumpIfNotBothSmiUsingTypeInfo(left->reg(), right->reg(), edx, | 1860 JumpIfNotBothSmiUsingTypeInfo(left->reg(), right->reg(), edx, |
1861 left_type_info, right_type_info, deferred); | 1861 left_type_info, right_type_info, deferred); |
1862 if (!left_is_in_eax) { | 1862 if (!left_is_in_eax) { |
1863 __ mov(eax, left->reg()); | 1863 __ mov(eax, left->reg()); |
1864 } | 1864 } |
1865 // Sign extend eax into edx:eax. | 1865 // Sign extend eax into edx:eax. |
1866 __ cdq(); | 1866 __ cdq(); |
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1939 if (left_type_info.IsSmi()) { | 1939 if (left_type_info.IsSmi()) { |
1940 if (FLAG_debug_code) __ AbortIfNotSmi(left->reg()); | 1940 if (FLAG_debug_code) __ AbortIfNotSmi(left->reg()); |
1941 } | 1941 } |
1942 if (right_type_info.IsSmi()) { | 1942 if (right_type_info.IsSmi()) { |
1943 if (FLAG_debug_code) __ AbortIfNotSmi(right->reg()); | 1943 if (FLAG_debug_code) __ AbortIfNotSmi(right->reg()); |
1944 } | 1944 } |
1945 | 1945 |
1946 // We will modify right, it must be spilled. | 1946 // We will modify right, it must be spilled. |
1947 frame_->Spill(ecx); | 1947 frame_->Spill(ecx); |
1948 // DeferredInlineBinaryOperation requires all the registers that it is told | 1948 // DeferredInlineBinaryOperation requires all the registers that it is told |
1949 // about to be spilled. | 1949 // about to be spilled and distinct. We know that right is ecx and left is |
| 1950 // not ecx. |
1950 frame_->Spill(left->reg()); | 1951 frame_->Spill(left->reg()); |
1951 | 1952 |
1952 // Use a fresh answer register to avoid spilling the left operand. | 1953 // Use a fresh answer register to avoid spilling the left operand. |
1953 answer = allocator_->Allocate(); | 1954 answer = allocator_->Allocate(); |
1954 ASSERT(answer.is_valid()); | 1955 ASSERT(answer.is_valid()); |
1955 DeferredInlineBinaryOperation* deferred = | 1956 DeferredInlineBinaryOperation* deferred = |
1956 new DeferredInlineBinaryOperation(op, | 1957 new DeferredInlineBinaryOperation(op, |
1957 answer.reg(), | 1958 answer.reg(), |
1958 left->reg(), | 1959 left->reg(), |
1959 ecx, | 1960 ecx, |
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2014 right->Unuse(); | 2015 right->Unuse(); |
2015 ASSERT(answer.is_valid()); | 2016 ASSERT(answer.is_valid()); |
2016 return answer; | 2017 return answer; |
2017 } | 2018 } |
2018 | 2019 |
2019 // Handle the other binary operations. | 2020 // Handle the other binary operations. |
2020 left->ToRegister(); | 2021 left->ToRegister(); |
2021 right->ToRegister(); | 2022 right->ToRegister(); |
2022 // DeferredInlineBinaryOperation requires all the registers that it is told | 2023 // DeferredInlineBinaryOperation requires all the registers that it is told |
2023 // about to be spilled. | 2024 // about to be spilled. |
2024 frame_->Spill(left->reg()); | 2025 Result distinct_right = frame_->MakeDistinctAndSpilled(left, right); |
2025 frame_->Spill(right->reg()); | |
2026 // A newly allocated register answer is used to hold the answer. The | 2026 // A newly allocated register answer is used to hold the answer. The |
2027 // registers containing left and right are not modified so they don't | 2027 // registers containing left and right are not modified so they don't |
2028 // need to be spilled in the fast case. | 2028 // need to be spilled in the fast case. |
2029 answer = allocator_->Allocate(); | 2029 answer = allocator_->Allocate(); |
2030 ASSERT(answer.is_valid()); | 2030 ASSERT(answer.is_valid()); |
2031 | 2031 |
2032 // Perform the smi tag check. | 2032 // Perform the smi tag check. |
2033 DeferredInlineBinaryOperation* deferred = | 2033 DeferredInlineBinaryOperation* deferred = |
2034 new DeferredInlineBinaryOperation(op, | 2034 new DeferredInlineBinaryOperation(op, |
2035 answer.reg(), | 2035 answer.reg(), |
2036 left->reg(), | 2036 left->reg(), |
2037 right->reg(), | 2037 distinct_right.reg(), |
2038 left_type_info, | 2038 left_type_info, |
2039 right_type_info, | 2039 right_type_info, |
2040 overwrite_mode); | 2040 overwrite_mode); |
2041 Label non_smi_bit_op; | 2041 Label non_smi_bit_op; |
2042 if (op != Token::BIT_OR) { | 2042 if (op != Token::BIT_OR) { |
2043 JumpIfNotBothSmiUsingTypeInfo(left->reg(), right->reg(), answer.reg(), | 2043 JumpIfNotBothSmiUsingTypeInfo(left->reg(), right->reg(), answer.reg(), |
2044 left_type_info, right_type_info, | 2044 left_type_info, right_type_info, |
2045 deferred->NonSmiInputLabel()); | 2045 deferred->NonSmiInputLabel()); |
2046 } | 2046 } |
2047 | 2047 |
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14261 masm.GetCode(&desc); | 14261 masm.GetCode(&desc); |
14262 // Call the function from C++. | 14262 // Call the function from C++. |
14263 return FUNCTION_CAST<MemCopyFunction>(buffer); | 14263 return FUNCTION_CAST<MemCopyFunction>(buffer); |
14264 } | 14264 } |
14265 | 14265 |
14266 #undef __ | 14266 #undef __ |
14267 | 14267 |
14268 } } // namespace v8::internal | 14268 } } // namespace v8::internal |
14269 | 14269 |
14270 #endif // V8_TARGET_ARCH_IA32 | 14270 #endif // V8_TARGET_ARCH_IA32 |
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