Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(34)

Side by Side Diff: src/arm/assembler-arm.h

Issue 3064045: Add support for vstr for single precision VFP register. Updated ic-arm to... (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: Created 10 years, 4 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
« no previous file with comments | « no previous file | src/arm/assembler-arm.cc » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
(...skipping 948 matching lines...) Expand 10 before | Expand all | Expand 10 after
959 void vldr(const SwVfpRegister dst, 959 void vldr(const SwVfpRegister dst,
960 const Register base, 960 const Register base,
961 int offset, // Offset must be a multiple of 4. 961 int offset, // Offset must be a multiple of 4.
962 const Condition cond = al); 962 const Condition cond = al);
963 963
964 void vstr(const DwVfpRegister src, 964 void vstr(const DwVfpRegister src,
965 const Register base, 965 const Register base,
966 int offset, // Offset must be a multiple of 4. 966 int offset, // Offset must be a multiple of 4.
967 const Condition cond = al); 967 const Condition cond = al);
968 968
969 void vstr(const SwVfpRegister src,
970 const Register base,
971 int offset, // Offset must be a multiple of 4.
972 const Condition cond = al);
973
969 void vmov(const DwVfpRegister dst, 974 void vmov(const DwVfpRegister dst,
970 double imm, 975 double imm,
971 const Condition cond = al); 976 const Condition cond = al);
972 void vmov(const SwVfpRegister dst, 977 void vmov(const SwVfpRegister dst,
973 const SwVfpRegister src, 978 const SwVfpRegister src,
974 const Condition cond = al); 979 const Condition cond = al);
975 void vmov(const DwVfpRegister dst, 980 void vmov(const DwVfpRegister dst,
976 const DwVfpRegister src, 981 const DwVfpRegister src,
977 const Condition cond = al); 982 const Condition cond = al);
978 void vmov(const DwVfpRegister dst, 983 void vmov(const DwVfpRegister dst,
(...skipping 287 matching lines...) Expand 10 before | Expand all | Expand 10 after
1266 1271
1267 friend class RegExpMacroAssemblerARM; 1272 friend class RegExpMacroAssemblerARM;
1268 friend class RelocInfo; 1273 friend class RelocInfo;
1269 friend class CodePatcher; 1274 friend class CodePatcher;
1270 friend class BlockConstPoolScope; 1275 friend class BlockConstPoolScope;
1271 }; 1276 };
1272 1277
1273 } } // namespace v8::internal 1278 } } // namespace v8::internal
1274 1279
1275 #endif // V8_ARM_ASSEMBLER_ARM_H_ 1280 #endif // V8_ARM_ASSEMBLER_ARM_H_
OLDNEW
« no previous file with comments | « no previous file | src/arm/assembler-arm.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698