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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
6 // met: | 6 // met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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114 } | 114 } |
115 | 115 |
116 | 116 |
117 Address* RelocInfo::target_reference_address() { | 117 Address* RelocInfo::target_reference_address() { |
118 ASSERT(rmode_ == RelocInfo::EXTERNAL_REFERENCE); | 118 ASSERT(rmode_ == RelocInfo::EXTERNAL_REFERENCE); |
119 return reinterpret_cast<Address*>(pc_); | 119 return reinterpret_cast<Address*>(pc_); |
120 } | 120 } |
121 | 121 |
122 | 122 |
123 Address RelocInfo::call_address() { | 123 Address RelocInfo::call_address() { |
124 ASSERT(IsPatchedReturnSequence()); | 124 ASSERT((IsJSReturn(rmode()) && IsPatchedReturnSequence()) || |
| 125 (IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence())); |
125 return Assembler::target_address_at(pc_ + 1); | 126 return Assembler::target_address_at(pc_ + 1); |
126 } | 127 } |
127 | 128 |
128 | 129 |
129 void RelocInfo::set_call_address(Address target) { | 130 void RelocInfo::set_call_address(Address target) { |
130 ASSERT(IsPatchedReturnSequence()); | 131 ASSERT((IsJSReturn(rmode()) && IsPatchedReturnSequence()) || |
| 132 (IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence())); |
131 Assembler::set_target_address_at(pc_ + 1, target); | 133 Assembler::set_target_address_at(pc_ + 1, target); |
132 } | 134 } |
133 | 135 |
134 | 136 |
135 Object* RelocInfo::call_object() { | 137 Object* RelocInfo::call_object() { |
136 ASSERT(IsPatchedReturnSequence()); | |
137 return *call_object_address(); | 138 return *call_object_address(); |
138 } | 139 } |
139 | 140 |
140 | 141 |
| 142 void RelocInfo::set_call_object(Object* target) { |
| 143 *call_object_address() = target; |
| 144 } |
| 145 |
| 146 |
141 Object** RelocInfo::call_object_address() { | 147 Object** RelocInfo::call_object_address() { |
142 ASSERT(IsPatchedReturnSequence()); | 148 ASSERT((IsJSReturn(rmode()) && IsPatchedReturnSequence()) || |
| 149 (IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence())); |
143 return reinterpret_cast<Object**>(pc_ + 1); | 150 return reinterpret_cast<Object**>(pc_ + 1); |
144 } | 151 } |
145 | 152 |
146 | 153 |
147 void RelocInfo::set_call_object(Object* target) { | |
148 ASSERT(IsPatchedReturnSequence()); | |
149 *call_object_address() = target; | |
150 } | |
151 | |
152 | |
153 bool RelocInfo::IsPatchedReturnSequence() { | 154 bool RelocInfo::IsPatchedReturnSequence() { |
154 return *pc_ == 0xE8; | 155 return *pc_ == 0xE8; |
155 } | 156 } |
156 | 157 |
157 | 158 |
158 bool RelocInfo::IsPatchedDebugBreakSlotSequence() { | 159 bool RelocInfo::IsPatchedDebugBreakSlotSequence() { |
159 return !Assembler::IsNop(pc()); | 160 return !Assembler::IsNop(pc()); |
160 } | 161 } |
161 | 162 |
162 | 163 |
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351 | 352 |
352 Operand::Operand(int32_t disp, RelocInfo::Mode rmode) { | 353 Operand::Operand(int32_t disp, RelocInfo::Mode rmode) { |
353 // [disp/r] | 354 // [disp/r] |
354 set_modrm(0, ebp); | 355 set_modrm(0, ebp); |
355 set_dispr(disp, rmode); | 356 set_dispr(disp, rmode); |
356 } | 357 } |
357 | 358 |
358 } } // namespace v8::internal | 359 } } // namespace v8::internal |
359 | 360 |
360 #endif // V8_IA32_ASSEMBLER_IA32_INL_H_ | 361 #endif // V8_IA32_ASSEMBLER_IA32_INL_H_ |
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