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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
6 // are met: | 6 // are met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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1134 EMIT(0xD1); | 1134 EMIT(0xD1); |
1135 EMIT(0xD0 | dst.code()); | 1135 EMIT(0xD0 | dst.code()); |
1136 } else { | 1136 } else { |
1137 EMIT(0xC1); | 1137 EMIT(0xC1); |
1138 EMIT(0xD0 | dst.code()); | 1138 EMIT(0xD0 | dst.code()); |
1139 EMIT(imm8); | 1139 EMIT(imm8); |
1140 } | 1140 } |
1141 } | 1141 } |
1142 | 1142 |
1143 | 1143 |
| 1144 void Assembler::rcr(Register dst, uint8_t imm8) { |
| 1145 EnsureSpace ensure_space(this); |
| 1146 last_pc_ = pc_; |
| 1147 ASSERT(is_uint5(imm8)); // illegal shift count |
| 1148 if (imm8 == 1) { |
| 1149 EMIT(0xD1); |
| 1150 EMIT(0xD8 | dst.code()); |
| 1151 } else { |
| 1152 EMIT(0xC1); |
| 1153 EMIT(0xD8 | dst.code()); |
| 1154 EMIT(imm8); |
| 1155 } |
| 1156 } |
| 1157 |
| 1158 |
1144 void Assembler::sar(Register dst, uint8_t imm8) { | 1159 void Assembler::sar(Register dst, uint8_t imm8) { |
1145 EnsureSpace ensure_space(this); | 1160 EnsureSpace ensure_space(this); |
1146 last_pc_ = pc_; | 1161 last_pc_ = pc_; |
1147 ASSERT(is_uint5(imm8)); // illegal shift count | 1162 ASSERT(is_uint5(imm8)); // illegal shift count |
1148 if (imm8 == 1) { | 1163 if (imm8 == 1) { |
1149 EMIT(0xD1); | 1164 EMIT(0xD1); |
1150 EMIT(0xF8 | dst.code()); | 1165 EMIT(0xF8 | dst.code()); |
1151 } else { | 1166 } else { |
1152 EMIT(0xC1); | 1167 EMIT(0xC1); |
1153 EMIT(0xF8 | dst.code()); | 1168 EMIT(0xF8 | dst.code()); |
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2591 fprintf(coverage_log, "%s\n", file_line); | 2606 fprintf(coverage_log, "%s\n", file_line); |
2592 fflush(coverage_log); | 2607 fflush(coverage_log); |
2593 } | 2608 } |
2594 } | 2609 } |
2595 | 2610 |
2596 #endif | 2611 #endif |
2597 | 2612 |
2598 } } // namespace v8::internal | 2613 } } // namespace v8::internal |
2599 | 2614 |
2600 #endif // V8_TARGET_ARCH_IA32 | 2615 #endif // V8_TARGET_ARCH_IA32 |
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