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Unified Diff: gcc/gcc/doc/arm-neon-intrinsics.texi

Issue 3050029: [gcc] GCC 4.5.0=>4.5.1 (Closed) Base URL: ssh://git@gitrw.chromium.org:9222/nacl-toolchain.git
Patch Set: Created 10 years, 5 months ago
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Index: gcc/gcc/doc/arm-neon-intrinsics.texi
diff --git a/gcc/gcc/doc/arm-neon-intrinsics.texi b/gcc/gcc/doc/arm-neon-intrinsics.texi
index c35662c01e98f0b1e808f5a2e34bd18789f4cd24..0016111d247cd1ea14f1e12b6b3b375a414ff7ba 100644
--- a/gcc/gcc/doc/arm-neon-intrinsics.texi
+++ b/gcc/gcc/doc/arm-neon-intrinsics.texi
@@ -4696,7 +4696,7 @@
@itemize @bullet
@item uint32_t vget_lane_u32 (uint32x2_t, const int)
-@*@emph{Form of expected instruction(s):} @code{vmov.u32 @var{r0}, @var{d0}[@var{0}]}
+@*@emph{Form of expected instruction(s):} @code{vmov.32 @var{r0}, @var{d0}[@var{0}]}
@end itemize
@@ -4714,7 +4714,7 @@
@itemize @bullet
@item int32_t vget_lane_s32 (int32x2_t, const int)
-@*@emph{Form of expected instruction(s):} @code{vmov.s32 @var{r0}, @var{d0}[@var{0}]}
+@*@emph{Form of expected instruction(s):} @code{vmov.32 @var{r0}, @var{d0}[@var{0}]}
@end itemize
@@ -4732,7 +4732,7 @@
@itemize @bullet
@item float32_t vget_lane_f32 (float32x2_t, const int)
-@*@emph{Form of expected instruction(s):} @code{vmov.f32 @var{r0}, @var{d0}[@var{0}]}
+@*@emph{Form of expected instruction(s):} @code{vmov.32 @var{r0}, @var{d0}[@var{0}]}
@end itemize
@@ -4762,7 +4762,7 @@
@itemize @bullet
@item uint32_t vgetq_lane_u32 (uint32x4_t, const int)
-@*@emph{Form of expected instruction(s):} @code{vmov.u32 @var{r0}, @var{d0}[@var{0}]}
+@*@emph{Form of expected instruction(s):} @code{vmov.32 @var{r0}, @var{d0}[@var{0}]}
@end itemize
@@ -4780,7 +4780,7 @@
@itemize @bullet
@item int32_t vgetq_lane_s32 (int32x4_t, const int)
-@*@emph{Form of expected instruction(s):} @code{vmov.s32 @var{r0}, @var{d0}[@var{0}]}
+@*@emph{Form of expected instruction(s):} @code{vmov.32 @var{r0}, @var{d0}[@var{0}]}
@end itemize
@@ -4798,7 +4798,7 @@
@itemize @bullet
@item float32_t vgetq_lane_f32 (float32x4_t, const int)
-@*@emph{Form of expected instruction(s):} @code{vmov.f32 @var{r0}, @var{d0}[@var{0}]}
+@*@emph{Form of expected instruction(s):} @code{vmov.32 @var{r0}, @var{d0}[@var{0}]}
@end itemize
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