Index: gcc/gcc/config/rs6000/constraints.md |
diff --git a/gcc/gcc/config/rs6000/constraints.md b/gcc/gcc/config/rs6000/constraints.md |
index 7f551994b7d8daa7fa9ff95c843fc24116d343c8..7b99094d738561c79488ec7e4cb78b4d941f0cd7 100644 |
--- a/gcc/gcc/config/rs6000/constraints.md |
+++ b/gcc/gcc/config/rs6000/constraints.md |
@@ -1,5 +1,5 @@ |
;; Constraint definitions for RS6000 |
-;; Copyright (C) 2006, 2007 Free Software Foundation, Inc. |
+;; Copyright (C) 2006, 2007, 2009, 2010 Free Software Foundation, Inc. |
;; |
;; This file is part of GCC. |
;; |
@@ -17,10 +17,14 @@ |
;; along with GCC; see the file COPYING3. If not see |
;; <http://www.gnu.org/licenses/>. |
+;; Available constraint letters: "e", "k", "u", "A", "B", "C", "D" |
+ |
;; Register constraints |
-(define_register_constraint "f" "TARGET_HARD_FLOAT && TARGET_FPRS |
- ? FLOAT_REGS : NO_REGS" |
+(define_register_constraint "f" "rs6000_constraints[RS6000_CONSTRAINT_f]" |
+ "@internal") |
+ |
+(define_register_constraint "d" "rs6000_constraints[RS6000_CONSTRAINT_d]" |
"@internal") |
(define_register_constraint "b" "BASE_REGS" |
@@ -50,6 +54,28 @@ |
(define_register_constraint "z" "XER_REGS" |
"@internal") |
+;; Use w as a prefix to add VSX modes |
+;; vector double (V2DF) |
+(define_register_constraint "wd" "rs6000_constraints[RS6000_CONSTRAINT_wd]" |
+ "@internal") |
+ |
+;; vector float (V4SF) |
+(define_register_constraint "wf" "rs6000_constraints[RS6000_CONSTRAINT_wf]" |
+ "@internal") |
+ |
+;; scalar double (DF) |
+(define_register_constraint "ws" "rs6000_constraints[RS6000_CONSTRAINT_ws]" |
+ "@internal") |
+ |
+;; any VSX register |
+(define_register_constraint "wa" "rs6000_constraints[RS6000_CONSTRAINT_wa]" |
+ "@internal") |
+ |
+;; Altivec style load/store that ignores the bottom bits of the address |
+(define_memory_constraint "wZ" |
+ "Indexed or indirect memory operand, ignoring the bottom 4 bits" |
+ (match_operand 0 "altivec_indexed_or_indirect_operand")) |
+ |
;; Integer constraints |
(define_constraint "I" |
@@ -109,8 +135,17 @@ |
;; Memory constraints |
+(define_memory_constraint "es" |
+ "A ``stable'' memory operand; that is, one which does not include any |
+automodification of the base register. Unlike @samp{m}, this constraint |
+can be used in @code{asm} statements that might access the operand |
+several times, or that might not access it at all." |
+ (and (match_code "mem") |
+ (match_test "GET_RTX_CLASS (GET_CODE (XEXP (op, 0))) != RTX_AUTOINC"))) |
+ |
(define_memory_constraint "Q" |
- "Memory operand that is just an offset from a reg" |
+ "Memory operand that is an offset from a register (it is usually better |
+to use @samp{m} or @samp{es} in @code{asm} statements)" |
(and (match_code "mem") |
(match_test "GET_CODE (XEXP (op, 0)) == REG"))) |
@@ -119,7 +154,8 @@ |
(match_operand 0 "word_offset_memref_operand")) |
(define_memory_constraint "Z" |
- "Indexed or indirect memory operand" |
+ "Memory operand that is an indexed or indirect from a register (it is |
+usually better to use @samp{m} or @samp{es} in @code{asm} statements)" |
(match_operand 0 "indexed_or_indirect_operand")) |
;; Address constraints |
@@ -159,3 +195,7 @@ |
(define_constraint "W" |
"vector constant that does not require memory" |
(match_operand 0 "easy_vector_constant")) |
+ |
+(define_constraint "j" |
+ "Zero vector constant" |
+ (match_test "(op == const0_rtx || op == CONST0_RTX (GET_MODE (op)))")) |