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| 1 // Copyright 2010 the V8 project authors. All rights reserved. | 1 // Copyright 2010 the V8 project authors. All rights reserved. |
| 2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
| 3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
| 4 // met: | 4 // met: |
| 5 // | 5 // |
| 6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
| 7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
| 8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
| 9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
| 10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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| 411 bool KeyedLoadIC::PatchInlinedLoad(Address address, Object* map) { | 411 bool KeyedLoadIC::PatchInlinedLoad(Address address, Object* map) { |
| 412 return PatchInlinedMapCheck(address, map); | 412 return PatchInlinedMapCheck(address, map); |
| 413 } | 413 } |
| 414 | 414 |
| 415 | 415 |
| 416 bool KeyedStoreIC::PatchInlinedStore(Address address, Object* map) { | 416 bool KeyedStoreIC::PatchInlinedStore(Address address, Object* map) { |
| 417 return PatchInlinedMapCheck(address, map); | 417 return PatchInlinedMapCheck(address, map); |
| 418 } | 418 } |
| 419 | 419 |
| 420 | 420 |
| 421 void KeyedLoadIC::ClearInlinedVersion(Address address) { | |
| 422 // Insert null as the map to check for to make sure the map check fails | |
| 423 // sending control flow to the IC instead of the inlined version. | |
| 424 PatchInlinedLoad(address, Heap::null_value()); | |
| 425 } | |
| 426 | |
| 427 | |
| 428 void KeyedStoreIC::ClearInlinedVersion(Address address) { | |
| 429 // Insert null as the elements map to check for. This will make | |
| 430 // sure that the elements fast-case map check fails so that control | |
| 431 // flows to the IC instead of the inlined version. | |
| 432 PatchInlinedStore(address, Heap::null_value()); | |
| 433 } | |
| 434 | |
| 435 | |
| 436 void KeyedStoreIC::RestoreInlinedVersion(Address address) { | |
| 437 // Restore the fast-case elements map check so that the inlined | |
| 438 // version can be used again. | |
| 439 PatchInlinedStore(address, Heap::fixed_array_map()); | |
| 440 } | |
| 441 | |
| 442 | |
| 443 void KeyedLoadIC::GenerateMiss(MacroAssembler* masm) { | 421 void KeyedLoadIC::GenerateMiss(MacroAssembler* masm) { |
| 444 // ----------- S t a t e ------------- | 422 // ----------- S t a t e ------------- |
| 445 // -- rax : key | 423 // -- rax : key |
| 446 // -- rdx : receiver | 424 // -- rdx : receiver |
| 447 // -- rsp[0] : return address | 425 // -- rsp[0] : return address |
| 448 // ----------------------------------- | 426 // ----------------------------------- |
| 449 | 427 |
| 450 __ IncrementCounter(&Counters::keyed_load_miss, 1); | 428 __ IncrementCounter(&Counters::keyed_load_miss, 1); |
| 451 | 429 |
| 452 __ pop(rbx); | 430 __ pop(rbx); |
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| 1623 GenerateCallNormal(masm, argc); | 1601 GenerateCallNormal(masm, argc); |
| 1624 GenerateMiss(masm, argc); | 1602 GenerateMiss(masm, argc); |
| 1625 } | 1603 } |
| 1626 | 1604 |
| 1627 | 1605 |
| 1628 // The offset from the inlined patch site to the start of the | 1606 // The offset from the inlined patch site to the start of the |
| 1629 // inlined load instruction. | 1607 // inlined load instruction. |
| 1630 const int LoadIC::kOffsetToLoadInstruction = 20; | 1608 const int LoadIC::kOffsetToLoadInstruction = 20; |
| 1631 | 1609 |
| 1632 | 1610 |
| 1633 void LoadIC::ClearInlinedVersion(Address address) { | |
| 1634 // Reset the map check of the inlined inobject property load (if | |
| 1635 // present) to guarantee failure by holding an invalid map (the null | |
| 1636 // value). The offset can be patched to anything. | |
| 1637 PatchInlinedLoad(address, Heap::null_value(), kMaxInt); | |
| 1638 } | |
| 1639 | |
| 1640 | |
| 1641 void LoadIC::GenerateMiss(MacroAssembler* masm) { | 1611 void LoadIC::GenerateMiss(MacroAssembler* masm) { |
| 1642 // ----------- S t a t e ------------- | 1612 // ----------- S t a t e ------------- |
| 1643 // -- rax : receiver | 1613 // -- rax : receiver |
| 1644 // -- rcx : name | 1614 // -- rcx : name |
| 1645 // -- rsp[0] : return address | 1615 // -- rsp[0] : return address |
| 1646 // ----------------------------------- | 1616 // ----------------------------------- |
| 1647 | 1617 |
| 1648 __ IncrementCounter(&Counters::load_miss, 1); | 1618 __ IncrementCounter(&Counters::load_miss, 1); |
| 1649 | 1619 |
| 1650 __ pop(rbx); | 1620 __ pop(rbx); |
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| 1760 // The offset is in the 32-bit displacement of a seven byte | 1730 // The offset is in the 32-bit displacement of a seven byte |
| 1761 // memory-to-register move instruction (REX.W 0x88 ModR/M disp32), | 1731 // memory-to-register move instruction (REX.W 0x88 ModR/M disp32), |
| 1762 // so we add 3 to get the offset of the displacement. | 1732 // so we add 3 to get the offset of the displacement. |
| 1763 Address offset_address = | 1733 Address offset_address = |
| 1764 test_instruction_address + delta + kOffsetToLoadInstruction + 3; | 1734 test_instruction_address + delta + kOffsetToLoadInstruction + 3; |
| 1765 *reinterpret_cast<int*>(offset_address) = offset - kHeapObjectTag; | 1735 *reinterpret_cast<int*>(offset_address) = offset - kHeapObjectTag; |
| 1766 return true; | 1736 return true; |
| 1767 } | 1737 } |
| 1768 | 1738 |
| 1769 | 1739 |
| 1740 bool StoreIC::PatchInlinedStore(Address address, Object* map, int offset) { |
| 1741 // TODO(787): Implement inline stores on x64. |
| 1742 return false; |
| 1743 } |
| 1744 |
| 1745 |
| 1770 void StoreIC::GenerateMiss(MacroAssembler* masm) { | 1746 void StoreIC::GenerateMiss(MacroAssembler* masm) { |
| 1771 // ----------- S t a t e ------------- | 1747 // ----------- S t a t e ------------- |
| 1772 // -- rax : value | 1748 // -- rax : value |
| 1773 // -- rcx : name | 1749 // -- rcx : name |
| 1774 // -- rdx : receiver | 1750 // -- rdx : receiver |
| 1775 // -- rsp[0] : return address | 1751 // -- rsp[0] : return address |
| 1776 // ----------------------------------- | 1752 // ----------------------------------- |
| 1777 | 1753 |
| 1778 __ pop(rbx); | 1754 __ pop(rbx); |
| 1779 __ push(rdx); // receiver | 1755 __ push(rdx); // receiver |
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| 1877 GenerateMiss(masm); | 1853 GenerateMiss(masm); |
| 1878 } | 1854 } |
| 1879 | 1855 |
| 1880 | 1856 |
| 1881 #undef __ | 1857 #undef __ |
| 1882 | 1858 |
| 1883 | 1859 |
| 1884 } } // namespace v8::internal | 1860 } } // namespace v8::internal |
| 1885 | 1861 |
| 1886 #endif // V8_TARGET_ARCH_X64 | 1862 #endif // V8_TARGET_ARCH_X64 |
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