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1 // Copyright 2006-2009 the V8 project authors. All rights reserved. | 1 // Copyright 2006-2009 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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1721 Register scratch1, | 1721 Register scratch1, |
1722 Register scratch2, | 1722 Register scratch2, |
1723 Register heap_number_map, | 1723 Register heap_number_map, |
1724 Label* gc_required) { | 1724 Label* gc_required) { |
1725 AllocateHeapNumber(result, scratch1, scratch2, heap_number_map, gc_required); | 1725 AllocateHeapNumber(result, scratch1, scratch2, heap_number_map, gc_required); |
1726 sub(scratch1, result, Operand(kHeapObjectTag)); | 1726 sub(scratch1, result, Operand(kHeapObjectTag)); |
1727 vstr(value, scratch1, HeapNumber::kValueOffset); | 1727 vstr(value, scratch1, HeapNumber::kValueOffset); |
1728 } | 1728 } |
1729 | 1729 |
1730 | 1730 |
| 1731 // Copies a fixed number of fields of heap objects from src to dst. |
| 1732 void MacroAssembler::CopyFields(Register dst, |
| 1733 Register src, |
| 1734 RegList temps, |
| 1735 int field_count) { |
| 1736 // At least one bit set in the first 15 registers. |
| 1737 ASSERT((temps & ((1 << 15) - 1)) != 0); |
| 1738 ASSERT((temps & dst.bit()) == 0); |
| 1739 ASSERT((temps & src.bit()) == 0); |
| 1740 // Primitive implementation using only one temporary register. |
| 1741 |
| 1742 Register tmp = no_reg; |
| 1743 // Find a temp register in temps list. |
| 1744 for (int i = 0; i < 15; i++) { |
| 1745 if ((temps & (1 << i)) != 0) { |
| 1746 tmp.set_code(i); |
| 1747 break; |
| 1748 } |
| 1749 } |
| 1750 ASSERT(!tmp.is(no_reg)); |
| 1751 |
| 1752 for (int i = 0; i < field_count; i++) { |
| 1753 ldr(tmp, FieldMemOperand(src, i * kPointerSize)); |
| 1754 str(tmp, FieldMemOperand(dst, i * kPointerSize)); |
| 1755 } |
| 1756 } |
| 1757 |
| 1758 |
1731 void MacroAssembler::CountLeadingZeros(Register zeros, // Answer. | 1759 void MacroAssembler::CountLeadingZeros(Register zeros, // Answer. |
1732 Register source, // Input. | 1760 Register source, // Input. |
1733 Register scratch) { | 1761 Register scratch) { |
1734 ASSERT(!zeros.is(source) || !source.is(zeros)); | 1762 ASSERT(!zeros.is(source) || !source.is(zeros)); |
1735 ASSERT(!zeros.is(scratch)); | 1763 ASSERT(!zeros.is(scratch)); |
1736 ASSERT(!scratch.is(ip)); | 1764 ASSERT(!scratch.is(ip)); |
1737 ASSERT(!source.is(ip)); | 1765 ASSERT(!source.is(ip)); |
1738 ASSERT(!zeros.is(ip)); | 1766 ASSERT(!zeros.is(ip)); |
1739 #ifdef CAN_USE_ARMV5_INSTRUCTIONS | 1767 #ifdef CAN_USE_ARMV5_INSTRUCTIONS |
1740 clz(zeros, source); // This instruction is only supported after ARM5. | 1768 clz(zeros, source); // This instruction is only supported after ARM5. |
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1883 | 1911 |
1884 void CodePatcher::Emit(Address addr) { | 1912 void CodePatcher::Emit(Address addr) { |
1885 masm()->emit(reinterpret_cast<Instr>(addr)); | 1913 masm()->emit(reinterpret_cast<Instr>(addr)); |
1886 } | 1914 } |
1887 #endif // ENABLE_DEBUGGER_SUPPORT | 1915 #endif // ENABLE_DEBUGGER_SUPPORT |
1888 | 1916 |
1889 | 1917 |
1890 } } // namespace v8::internal | 1918 } } // namespace v8::internal |
1891 | 1919 |
1892 #endif // V8_TARGET_ARCH_ARM | 1920 #endif // V8_TARGET_ARCH_ARM |
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