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| 1 // Copyright 2008 the V8 project authors. All rights reserved. | 1 // Copyright 2008 the V8 project authors. All rights reserved. |
| 2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
| 3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
| 4 // met: | 4 // met: |
| 5 // | 5 // |
| 6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
| 7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
| 8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
| 9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
| 10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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| 36 #if !defined(__arm__) | 36 #if !defined(__arm__) |
| 37 | 37 |
| 38 // Only build the simulator if not compiling for real ARM hardware. | 38 // Only build the simulator if not compiling for real ARM hardware. |
| 39 namespace assembler { namespace arm { | 39 namespace assembler { namespace arm { |
| 40 | 40 |
| 41 using ::v8::internal::Object; | 41 using ::v8::internal::Object; |
| 42 using ::v8::internal::PrintF; | 42 using ::v8::internal::PrintF; |
| 43 using ::v8::internal::OS; | 43 using ::v8::internal::OS; |
| 44 using ::v8::internal::ReadLine; | 44 using ::v8::internal::ReadLine; |
| 45 using ::v8::internal::DeleteArray; | 45 using ::v8::internal::DeleteArray; |
| 46 | 46 #ifdef WIN32 |
| 47 #define SScanF sscanf_s |
| 48 #else |
| 49 #define SScanF sscanf |
| 50 #endif |
| 47 | 51 |
| 48 // The Debugger class is used by the simulator while debugging simulated ARM | 52 // The Debugger class is used by the simulator while debugging simulated ARM |
| 49 // code. | 53 // code. |
| 50 class Debugger { | 54 class Debugger { |
| 51 public: | 55 public: |
| 52 explicit Debugger(Simulator* sim); | 56 explicit Debugger(Simulator* sim); |
| 53 ~Debugger(); | 57 ~Debugger(); |
| 54 | 58 |
| 55 void Stop(Instr* instr); | 59 void Stop(Instr* instr); |
| 56 void Debug(); | 60 void Debug(); |
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| 123 bool Debugger::GetValue(char* desc, int32_t* value) { | 127 bool Debugger::GetValue(char* desc, int32_t* value) { |
| 124 int regnum = RegNameToRegNum(desc); | 128 int regnum = RegNameToRegNum(desc); |
| 125 if (regnum >= 0) { | 129 if (regnum >= 0) { |
| 126 if (regnum == 15) { | 130 if (regnum == 15) { |
| 127 *value = sim_->get_pc(); | 131 *value = sim_->get_pc(); |
| 128 } else { | 132 } else { |
| 129 *value = sim_->get_register(regnum); | 133 *value = sim_->get_register(regnum); |
| 130 } | 134 } |
| 131 return true; | 135 return true; |
| 132 } else { | 136 } else { |
| 133 return sscanf(desc, "%i", value) == 1; // NOLINT | 137 return SScanF(desc, "%i", value) == 1; // NOLINT |
| 134 } | 138 } |
| 135 return false; | 139 return false; |
| 136 } | 140 } |
| 137 | 141 |
| 138 | 142 |
| 139 bool Debugger::SetBreakpoint(Instr* breakpc) { | 143 bool Debugger::SetBreakpoint(Instr* breakpc) { |
| 140 // Check if a breakpoint can be set. If not return without any side-effects. | 144 // Check if a breakpoint can be set. If not return without any side-effects. |
| 141 if (sim_->break_pc_ != NULL) { | 145 if (sim_->break_pc_ != NULL) { |
| 142 return false; | 146 return false; |
| 143 } | 147 } |
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| 208 reinterpret_cast<byte*>(sim_->get_pc())); | 212 reinterpret_cast<byte*>(sim_->get_pc())); |
| 209 PrintF(" 0x%x %s\n", sim_->get_pc(), buffer.start()); | 213 PrintF(" 0x%x %s\n", sim_->get_pc(), buffer.start()); |
| 210 last_pc = sim_->get_pc(); | 214 last_pc = sim_->get_pc(); |
| 211 } | 215 } |
| 212 char* line = ReadLine("sim> "); | 216 char* line = ReadLine("sim> "); |
| 213 if (line == NULL) { | 217 if (line == NULL) { |
| 214 break; | 218 break; |
| 215 } else { | 219 } else { |
| 216 // Use sscanf to parse the individual parts of the command line. At the | 220 // Use sscanf to parse the individual parts of the command line. At the |
| 217 // moment no command expects more than two parameters. | 221 // moment no command expects more than two parameters. |
| 218 int args = sscanf(line, // NOLINT | 222 int args = SScanF(line, // NOLINT |
| 219 "%" XSTR(COMMAND_SIZE) "s " | 223 "%" XSTR(COMMAND_SIZE) "s " |
| 220 "%" XSTR(ARG_SIZE) "s " | 224 "%" XSTR(ARG_SIZE) "s " |
| 221 "%" XSTR(ARG_SIZE) "s", | 225 "%" XSTR(ARG_SIZE) "s", |
| 222 cmd, arg1, arg2); | 226 cmd, arg1, arg2); |
| 223 if ((strcmp(cmd, "si") == 0) || (strcmp(cmd, "stepi") == 0)) { | 227 if ((strcmp(cmd, "si") == 0) || (strcmp(cmd, "stepi") == 0)) { |
| 224 sim_->InstructionDecode(reinterpret_cast<Instr*>(sim_->get_pc())); | 228 sim_->InstructionDecode(reinterpret_cast<Instr*>(sim_->get_pc())); |
| 225 } else if ((strcmp(cmd, "c") == 0) || (strcmp(cmd, "cont") == 0)) { | 229 } else if ((strcmp(cmd, "c") == 0) || (strcmp(cmd, "cont") == 0)) { |
| 226 // Execute the one instruction we broke at with breakpoints disabled. | 230 // Execute the one instruction we broke at with breakpoints disabled. |
| 227 sim_->InstructionDecode(reinterpret_cast<Instr*>(sim_->get_pc())); | 231 sim_->InstructionDecode(reinterpret_cast<Instr*>(sim_->get_pc())); |
| 228 // Leave the debugger shell. | 232 // Leave the debugger shell. |
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| 1488 set_register(r10, r10_val); | 1492 set_register(r10, r10_val); |
| 1489 set_register(r11, r11_val); | 1493 set_register(r11, r11_val); |
| 1490 | 1494 |
| 1491 int result = get_register(r0); | 1495 int result = get_register(r0); |
| 1492 return reinterpret_cast<Object*>(result); | 1496 return reinterpret_cast<Object*>(result); |
| 1493 } | 1497 } |
| 1494 | 1498 |
| 1495 } } // namespace assembler::arm | 1499 } } // namespace assembler::arm |
| 1496 | 1500 |
| 1497 #endif // !defined(__arm__) | 1501 #endif // !defined(__arm__) |
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