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Issue 2885002: ARM: Use the vsqrt instruction when available... (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: '' Created 10 years, 5 months ago
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1 // Copyright 2006-2009 the V8 project authors. All rights reserved. 1 // Copyright 2006-2009 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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1362 Register outHighReg, 1362 Register outHighReg,
1363 Register outLowReg) { 1363 Register outLowReg) {
1364 // ARMv7 VFP3 instructions to implement integer to double conversion. 1364 // ARMv7 VFP3 instructions to implement integer to double conversion.
1365 mov(r7, Operand(inReg, ASR, kSmiTagSize)); 1365 mov(r7, Operand(inReg, ASR, kSmiTagSize));
1366 vmov(s15, r7); 1366 vmov(s15, r7);
1367 vcvt_f64_s32(d7, s15); 1367 vcvt_f64_s32(d7, s15);
1368 vmov(outLowReg, outHighReg, d7); 1368 vmov(outLowReg, outHighReg, d7);
1369 } 1369 }
1370 1370
1371 1371
1372 void MacroAssembler::ObjectToDoubleVFPRegister(Register object,
1373 DwVfpRegister result,
1374 Register scratch1,
1375 Register scratch2,
1376 Register heap_number_map,
1377 SwVfpRegister scratch3,
1378 Label* not_number,
1379 ObjectToDoubleFlags flags) {
1380 Label done;
1381 if ((flags & OBJECT_NOT_SMI) == 0) {
1382 Label not_smi;
1383 BranchOnNotSmi(object, &not_smi);
1384 // Remove smi tag and convert to double.
1385 mov(scratch1, Operand(object, ASR, kSmiTagSize));
1386 vmov(scratch3, scratch1);
1387 vcvt_f64_s32(result, scratch3);
1388 b(&done);
1389 bind(&not_smi);
1390 }
1391 // Check for heap number and load double value from it.
1392 ldr(scratch1, FieldMemOperand(object, HeapObject::kMapOffset));
1393 sub(scratch2, object, Operand(kHeapObjectTag));
1394 cmp(scratch1, heap_number_map);
1395 b(ne, not_number);
1396 if ((flags & AVOID_NANS_AND_INFINITIES) != 0) {
1397 // If exponent is all ones the number is either a NaN or +/-Infinity.
1398 ldr(scratch1, FieldMemOperand(object, HeapNumber::kExponentOffset));
1399 Sbfx(scratch1,
1400 scratch1,
1401 HeapNumber::kExponentShift,
1402 HeapNumber::kExponentBits);
1403 // All-one value sign extend to -1.
1404 cmp(scratch1, Operand(-1));
1405 b(eq, not_number);
1406 }
1407 vldr(result, scratch2, HeapNumber::kValueOffset);
1408 bind(&done);
1409 }
1410
1411
1412 void MacroAssembler::SmiToDoubleVFPRegister(Register smi,
1413 DwVfpRegister value,
1414 Register scratch1,
1415 SwVfpRegister scratch2) {
1416 mov(scratch1, Operand(smi, ASR, kSmiTagSize));
1417 vmov(scratch2, scratch1);
1418 vcvt_f64_s32(value, scratch2);
1419 }
1420
1421
1372 void MacroAssembler::GetLeastBitsFromSmi(Register dst, 1422 void MacroAssembler::GetLeastBitsFromSmi(Register dst,
1373 Register src, 1423 Register src,
1374 int num_least_bits) { 1424 int num_least_bits) {
1375 if (CpuFeatures::IsSupported(ARMv7)) { 1425 if (CpuFeatures::IsSupported(ARMv7)) {
1376 ubfx(dst, src, kSmiTagSize, num_least_bits); 1426 ubfx(dst, src, kSmiTagSize, num_least_bits);
1377 } else { 1427 } else {
1378 mov(dst, Operand(src, ASR, kSmiTagSize)); 1428 mov(dst, Operand(src, ASR, kSmiTagSize));
1379 and_(dst, dst, Operand((1 << num_least_bits) - 1)); 1429 and_(dst, dst, Operand((1 << num_least_bits) - 1));
1380 } 1430 }
1381 } 1431 }
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1679 scratch2, 1729 scratch2,
1680 gc_required, 1730 gc_required,
1681 TAG_OBJECT); 1731 TAG_OBJECT);
1682 1732
1683 // Store heap number map in the allocated object. 1733 // Store heap number map in the allocated object.
1684 AssertRegisterIsRoot(heap_number_map, Heap::kHeapNumberMapRootIndex); 1734 AssertRegisterIsRoot(heap_number_map, Heap::kHeapNumberMapRootIndex);
1685 str(heap_number_map, FieldMemOperand(result, HeapObject::kMapOffset)); 1735 str(heap_number_map, FieldMemOperand(result, HeapObject::kMapOffset));
1686 } 1736 }
1687 1737
1688 1738
1739 void MacroAssembler::AllocateHeapNumberWithValue(Register result,
1740 DwVfpRegister value,
1741 Register scratch1,
1742 Register scratch2,
1743 Register heap_number_map,
1744 Label* gc_required) {
1745 AllocateHeapNumber(result, scratch1, scratch2, heap_number_map, gc_required);
1746 sub(scratch1, result, Operand(kHeapObjectTag));
1747 vstr(value, scratch1, HeapNumber::kValueOffset);
1748 }
1749
1750
1689 void MacroAssembler::CountLeadingZeros(Register zeros, // Answer. 1751 void MacroAssembler::CountLeadingZeros(Register zeros, // Answer.
1690 Register source, // Input. 1752 Register source, // Input.
1691 Register scratch) { 1753 Register scratch) {
1692 ASSERT(!zeros.is(source) || !source.is(zeros)); 1754 ASSERT(!zeros.is(source) || !source.is(zeros));
1693 ASSERT(!zeros.is(scratch)); 1755 ASSERT(!zeros.is(scratch));
1694 ASSERT(!scratch.is(ip)); 1756 ASSERT(!scratch.is(ip));
1695 ASSERT(!source.is(ip)); 1757 ASSERT(!source.is(ip));
1696 ASSERT(!zeros.is(ip)); 1758 ASSERT(!zeros.is(ip));
1697 #ifdef CAN_USE_ARMV5_INSTRUCTIONS 1759 #ifdef CAN_USE_ARMV5_INSTRUCTIONS
1698 clz(zeros, source); // This instruction is only supported after ARM5. 1760 clz(zeros, source); // This instruction is only supported after ARM5.
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1841 1903
1842 void CodePatcher::Emit(Address addr) { 1904 void CodePatcher::Emit(Address addr) {
1843 masm()->emit(reinterpret_cast<Instr>(addr)); 1905 masm()->emit(reinterpret_cast<Instr>(addr));
1844 } 1906 }
1845 #endif // ENABLE_DEBUGGER_SUPPORT 1907 #endif // ENABLE_DEBUGGER_SUPPORT
1846 1908
1847 1909
1848 } } // namespace v8::internal 1910 } } // namespace v8::internal
1849 1911
1850 #endif // V8_TARGET_ARCH_ARM 1912 #endif // V8_TARGET_ARCH_ARM
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