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Unified Diff: gcc/gcc/config/i386/i386.md

Issue 2880018: [gcc] Misc cleanup. (Closed) Base URL: ssh://git@chromiumos-git/nacl-toolchain.git
Patch Set: ready for code review Created 10 years, 5 months ago
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Index: gcc/gcc/config/i386/i386.md
diff --git a/gcc/gcc/config/i386/i386.md b/gcc/gcc/config/i386/i386.md
index de626c01ad64c1657f91c83f8dff6fc5ce577e0f..3b434da94ad7592c9b230e293575d0b1e0f7e119 100644
--- a/gcc/gcc/config/i386/i386.md
+++ b/gcc/gcc/config/i386/i386.md
@@ -2274,8 +2274,8 @@
(clobber (mem:BLK (scratch)))]
"TARGET_64BIT"
{
- gcc_assert (REGNO(operands[0]) != SP_REG || !flag_control_integrity);
- if (REGNO (operands[0]) != BP_REG || !flag_control_integrity)
+ gcc_assert (REGNO(operands[0]) != SP_REG || !TARGET_NACL);
+ if (REGNO (operands[0]) != BP_REG || !TARGET_NACL)
return "pop{q}\t%0";
else
return "pop{q}\t%%r11\n\tnaclrestbp\t%%r11d, %%r15";
@@ -2290,8 +2290,8 @@
(plus:DI (reg:DI SP_REG) (const_int 8)))]
"TARGET_64BIT"
{
- gcc_assert (REGNO(operands[0]) != SP_REG || !flag_control_integrity);
- if (REGNO (operands[0]) != BP_REG || !flag_control_integrity)
+ gcc_assert (REGNO(operands[0]) != SP_REG || !TARGET_NACL);
+ if (REGNO (operands[0]) != BP_REG || !TARGET_NACL)
return "pop{q}\t%0";
else
return "pop{q}\t%%r11\n\tnaclrestbp\t%%r11d, %%r15";
@@ -2423,7 +2423,7 @@
return "mov{l}\t{%k1, %k0|%k0, %k1}";
else if (which_alternative == 2)
return "movabs{q}\t{%1, %0|%0, %1}";
- else if (!flag_control_integrity)
+ else if (!TARGET_NACL)
return "mov{q}\t{%1, %0|%0, %1}";
else if (REGNO (operands[0]) == SP_REG)
if (REGNO (operands[1]) == BP_REG)
@@ -4152,7 +4152,7 @@
(define_insn "extendqihi2"
[(set (match_operand:HI 0 "register_operand" "=*a,r")
(sign_extend:HI (match_operand:QI 1 "nonimmediate_operand" "*0,qm")))]
- "!TARGET_64BIT || !flag_control_integrity"
+ "!TARGET_64BIT || !TARGET_NACL"
{
switch (get_attr_prefix_0f (insn))
{
@@ -6187,7 +6187,7 @@
switch (get_attr_type (insn))
{
case TYPE_LEA:
- if (flag_control_integrity)
+ if (TARGET_NACL)
{
if ((REGNO (operands[0]) != SP_REG)
&& (REGNO (operands[0]) != BP_REG))
@@ -6231,7 +6231,7 @@
&& INTVAL (operands[2]) != -128)))
{
operands[2] = GEN_INT (-INTVAL (operands[2]));
- if (flag_control_integrity)
+ if (TARGET_NACL)
{
if (REGNO (operands[0]) == SP_REG)
{
@@ -6247,7 +6247,7 @@
return "sub{q}\t{%2, %0|%0, %2}";
}
}
- else if (flag_control_integrity)
+ else if (TARGET_NACL)
{
if (REGNO (operands[0]) == SP_REG)
{
@@ -9810,7 +9810,7 @@
(match_operand 1 "" ""))]
"!SIBLING_CALL_P (insn)"
{
- gcc_assert (flag_control_integrity);
+ gcc_assert (TARGET_NACL);
if (TARGET_64BIT)
{
return "naclcall\t%0,%%r15";
@@ -9827,7 +9827,7 @@
(match_operand 1 "" ""))]
"!SIBLING_CALL_P (insn) && TARGET_64BIT"
{
- gcc_assert (flag_control_integrity);
+ gcc_assert (TARGET_NACL);
return "naclcall\t%k0,%%r15";
}
[(set_attr "type" "call")])
@@ -9837,7 +9837,7 @@
(match_operand 1 "" ""))]
"SIBLING_CALL_P (insn)"
{
- gcc_assert (flag_control_integrity);
+ gcc_assert (TARGET_NACL);
if (TARGET_64BIT)
{
return "nacljmp\t%0,%%r15";
@@ -9854,7 +9854,7 @@
(match_operand 1 "" ""))]
"SIBLING_CALL_P (insn) && TARGET_64BIT"
{
- gcc_assert (flag_control_integrity);
+ gcc_assert (TARGET_NACL);
return "nacljmp\t%k0,%%r15";
}
[(set_attr "type" "call")])
@@ -9866,7 +9866,7 @@
(match_operand:SI 2 "immediate_operand" "i")))]
""
{
- gcc_assert (flag_control_integrity);
+ gcc_assert (TARGET_NACL);
if (SIBLING_CALL_P (insn))
{
if (TARGET_64BIT)
@@ -9899,7 +9899,7 @@
(match_operand:SI 2 "immediate_operand" "i")))]
"TARGET_64BIT"
{
- gcc_assert (flag_control_integrity);
+ gcc_assert (TARGET_NACL);
if (SIBLING_CALL_P (insn))
{
return "nacljmp\t%k0,%%r15";
@@ -9917,7 +9917,7 @@
(match_operand 2 "" "")))]
"!SIBLING_CALL_P (insn)"
{
- gcc_assert (flag_control_integrity);
+ gcc_assert (TARGET_NACL);
if (TARGET_64BIT)
{
return "naclcall\t%1,%%r15";
@@ -9935,7 +9935,7 @@
(match_operand 2 "" "")))]
"!SIBLING_CALL_P (insn) && TARGET_64BIT"
{
- gcc_assert (flag_control_integrity);
+ gcc_assert (TARGET_NACL);
return "naclcall\t%k1,%%r15";
}
[(set_attr "type" "callv")])
@@ -9946,7 +9946,7 @@
(match_operand 2 "" "")))]
"SIBLING_CALL_P (insn) && !TARGET_64BIT"
{
- gcc_assert (flag_control_integrity);
+ gcc_assert (TARGET_NACL);
if (TARGET_64BIT)
{
return "nacljmp\t%1,%%r15";
@@ -9964,7 +9964,7 @@
(match_operand 2 "" "")))]
"SIBLING_CALL_P (insn) && TARGET_64BIT"
{
- gcc_assert (flag_control_integrity);
+ gcc_assert (TARGET_NACL);
return "nacljmp\t%k1,%%r15";
}
[(set_attr "type" "callv")])
@@ -9977,7 +9977,7 @@
(match_operand:SI 3 "immediate_operand" "i")))]
""
{
- gcc_assert (flag_control_integrity);
+ gcc_assert (TARGET_NACL);
if (SIBLING_CALL_P (insn))
{
if (TARGET_64BIT)
@@ -10011,7 +10011,7 @@
(match_operand:SI 3 "immediate_operand" "i")))]
"TARGET_64BIT"
{
- gcc_assert (flag_control_integrity);
+ gcc_assert (TARGET_NACL);
if (SIBLING_CALL_P (insn))
return "nacljmp\t%k1,%%r15";
else
@@ -10024,7 +10024,7 @@
UNSPEC_NACLJMP))]
""
{
- gcc_assert (flag_control_integrity);
+ gcc_assert (TARGET_NACL);
if (TARGET_64BIT)
{
return "nacljmp\t%0,%%r15";
@@ -10042,7 +10042,7 @@
UNSPEC_NACLJMP))]
"TARGET_64BIT"
{
- gcc_assert (flag_control_integrity);
+ gcc_assert (TARGET_NACL);
return "nacljmp\t%k0,%%r15";
}
[(set_attr "type" "ibr")
@@ -10054,7 +10054,7 @@
(use (label_ref (match_operand 1 "" "")))]
""
{
- gcc_assert (flag_control_integrity);
+ gcc_assert (TARGET_NACL);
if (TARGET_64BIT)
{
return "nacljmp\t%0,%%r15";
@@ -10073,7 +10073,7 @@
(use (label_ref (match_operand 1 "" "")))]
"TARGET_64BIT"
{
- gcc_assert (flag_control_integrity);
+ gcc_assert (TARGET_NACL);
return "nacljmp\t%k0,%%r15";
}
[(set_attr "type" "ibr")
@@ -10084,7 +10084,7 @@
UNSPEC_NACLRET)]
""
{
- gcc_assert (flag_control_integrity);
+ gcc_assert (TARGET_NACL);
if (TARGET_64BIT)
{
return "nacljmp\t%0,%%r15";
@@ -10102,7 +10102,7 @@
UNSPEC_NACLRET)]
"TARGET_64BIT"
{
- gcc_assert (flag_control_integrity);
+ gcc_assert (TARGET_NACL);
return "nacljmp\t%k0,%%r15";
}
[(set_attr "type" "ibr")
@@ -14486,7 +14486,7 @@
(match_operand:DI 1 "nonmemory_operand" "rN"))
(const_int 0)))]
"TARGET_64BIT && (TARGET_USE_BT ||
- optimize_function_for_size_p (cfun) && !flag_control_integrity)"
+ optimize_function_for_size_p (cfun) && !TARGET_NACL)"
"bt{q}\t{%1, %0|%0, %1}"
[(set_attr "type" "alu1")])
@@ -14499,7 +14499,7 @@
(match_operand:SI 1 "nonmemory_operand" "rN"))
(const_int 0)))]
"TARGET_USE_BT ||
- optimize_function_for_size_p (cfun) && !flag_control_integrity"
+ optimize_function_for_size_p (cfun) && !TARGET_NACL"
"bt{l}\t{%1, %0|%0, %1}"
[(set_attr "type" "alu1")])
@@ -14776,7 +14776,7 @@
(pc)))
(clobber (reg:CC FLAGS_REG))]
"TARGET_64BIT && (TARGET_USE_BT ||
- optimize_function_for_size_p (cfun) && !flag_control_integrity)"
+ optimize_function_for_size_p (cfun) && !TARGET_NACL)"
"#"
"&& 1"
[(set (reg:CCC FLAGS_REG)
@@ -14810,7 +14810,7 @@
(pc)))
(clobber (reg:CC FLAGS_REG))]
"TARGET_64BIT && (TARGET_USE_BT ||
- optimize_function_for_size_p (cfun) && !flag_control_integrity)
+ optimize_function_for_size_p (cfun) && !TARGET_NACL)
&& (INTVAL (operands[3]) & 0x3f) == 0x3f"
"#"
"&& 1"
@@ -14844,7 +14844,7 @@
(pc)))
(clobber (reg:CC FLAGS_REG))]
"TARGET_USE_BT ||
- optimize_function_for_size_p (cfun) && !flag_control_integrity"
+ optimize_function_for_size_p (cfun) && !TARGET_NACL"
"#"
"&& 1"
[(set (reg:CCC FLAGS_REG)
@@ -14878,7 +14878,7 @@
(pc)))
(clobber (reg:CC FLAGS_REG))]
"(TARGET_USE_BT ||
- optimize_function_for_size_p (cfun) && !flag_control_integrity)
+ optimize_function_for_size_p (cfun) && !TARGET_NACL)
&& (INTVAL (operands[3]) & 0x1f) == 0x1f"
"#"
"&& 1"
@@ -14908,7 +14908,7 @@
(pc)))
(clobber (reg:CC FLAGS_REG))]
"TARGET_USE_BT ||
- optimize_function_for_size_p (cfun) && !flag_control_integrity"
+ optimize_function_for_size_p (cfun) && !TARGET_NACL"
"#"
"&& 1"
[(set (reg:CCC FLAGS_REG)
@@ -14946,7 +14946,7 @@
(pc)))
(clobber (reg:CC FLAGS_REG))]
"(TARGET_USE_BT ||
- optimize_function_for_size_p (cfun) && !flag_control_integrity)
+ optimize_function_for_size_p (cfun) && !TARGET_NACL)
&& (INTVAL (operands[3]) & 0x1f) == 0x1f"
"#"
"&& 1"
@@ -15684,7 +15684,7 @@
if (crtl->args.pops_args)
{
rtx popc = GEN_INT (crtl->args.pops_args);
- if (flag_control_integrity && !getenv("NONACLRET"))
+ if (TARGET_NACL)
{
/* x86_64 dedicates R11 for call-scratch needs */
rtx ecx = gen_rtx_REG (SImode, TARGET_64BIT ? R11_REG : CX_REG);
@@ -15702,7 +15702,7 @@
[(return)]
"reload_completed"
{
- if (flag_control_integrity && !getenv("NONACLRET"))
+ if (TARGET_NACL)
if (TARGET_64BIT)
return "pop{q}\t%%r11\nnacljmp\t%%r11d,%%r15";
else
@@ -15722,7 +15722,7 @@
(unspec [(const_int 0)] UNSPEC_REP)]
"reload_completed"
{
- if (flag_control_integrity && !getenv("NONACLRET"))
+ if (TARGET_NACL)
if (TARGET_64BIT)
return "pop{q}\t%%r11\nnacljmp\t%%r11d,%%r15";
else
@@ -15740,7 +15740,7 @@
(use (match_operand:SI 0 "const_int_operand" ""))]
"reload_completed"
{
- if (flag_control_integrity && !getenv("NONACLRET"))
+ if (TARGET_NACL)
if (TARGET_64BIT)
return "pop{q}\t%%r11\nadd{l}\t%%esp,%0\nnacljmp\t%%r11d,%r15";
else
@@ -16576,7 +16576,7 @@
(plus:SI (unspec:SI [(const_int 0)] UNSPEC_TP)
(match_operand:SI 1 "register_operand" "0")))
(clobber (reg:CC FLAGS_REG))]
- "!TARGET_64BIT && !flag_control_integrity"
+ "!TARGET_64BIT && !TARGET_NACL"
"add{l}\t{%%gs:0, %0|%0, DWORD PTR gs:0}"
[(set_attr "type" "alu")
(set_attr "modrm" "0")
@@ -19653,7 +19653,7 @@
(use (match_dup 5))]
"TARGET_64BIT"
{
- if (flag_control_integrity)
+ if (TARGET_NACL)
{
return "movl\t%%esi, %%esi\nleaq\t(%%r15,%%rsi), %%rsi\n"
"rep movsq (%%rsi),%%nacl:(%%rdi),%%r15"
@@ -19702,7 +19702,7 @@
(use (match_dup 5))]
"TARGET_64BIT"
{
- if (flag_control_integrity)
+ if (TARGET_NACL)
{
return "movl\t%%esi, %%esi\nleaq\t(%%r15,%%rsi), %%rsi\n"
"rep movs{l|d} (%%rsi),%%nacl:(%%rdi),%%r15"
@@ -19747,7 +19747,7 @@
(use (match_dup 5))]
"TARGET_64BIT"
{
- if (flag_control_integrity)
+ if (TARGET_NACL)
{
return "movl\t%%esi, %%esi\nleaq\t(%%r15,%%rsi), %%rsi\n"
"rep movsb (%%rsi),%%nacl:(%%rdi),%%r15"
@@ -19840,7 +19840,7 @@
(const_int 8)))]
"TARGET_64BIT"
{
- if (flag_control_integrity)
+ if (TARGET_NACL)
{
return "stosq %%rax,%%nacl:(%%rdi),%%r15"
"\nmovl\t%%edi, %%edi";
@@ -19874,7 +19874,7 @@
(const_int 4)))]
"TARGET_64BIT"
{
- if (flag_control_integrity)
+ if (TARGET_NACL)
{
return "stos{l|d} %%eax,%%nacl:(%%rdi),%%r15"
"\nmovl\t%%edi, %%edi";
@@ -19908,7 +19908,7 @@
(const_int 2)))]
"TARGET_64BIT"
{
- if (flag_control_integrity)
+ if (TARGET_NACL)
{
return "stosw %%ax,%%nacl:(%%rdi),%%r15"
"\nmovl\t%%edi, %%edi";
@@ -19942,7 +19942,7 @@
(const_int 1)))]
"TARGET_64BIT"
{
- if (flag_control_integrity)
+ if (TARGET_NACL)
{
return "stosb %%al,%%nacl:(%%rdi),%%r15"
"\nmovl\t%%edi, %%edi";
@@ -19978,7 +19978,7 @@
(use (match_dup 4))]
"TARGET_64BIT"
{
- if (flag_control_integrity)
+ if (TARGET_NACL)
{
return "rep stosq %%rax,%%nacl:(%%rdi),%%r15"
"\nmovl\t%%edi, %%edi";
@@ -20022,7 +20022,7 @@
(use (match_dup 4))]
"TARGET_64BIT"
{
- if (flag_control_integrity)
+ if (TARGET_NACL)
{
return "rep stos{l|d} %%eax,%%nacl:(%%rdi),%%r15"
"\nmovl\t%%edi, %%edi";
@@ -20064,7 +20064,7 @@
(use (match_dup 4))]
"TARGET_64BIT"
{
- if (flag_control_integrity)
+ if (TARGET_NACL)
{
return "rep stosb %%al,%%nacl:(%%rdi),%%r15"
"\nmovl\t%%edi, %%edi";
@@ -20201,7 +20201,7 @@
(clobber (match_operand:DI 2 "register_operand" "=c"))]
"TARGET_64BIT"
{
- if (flag_control_integrity)
+ if (TARGET_NACL)
{
return "movl\t%%esi, %%esi\nleaq\t(%%r15,%%rsi), %%rsi\n"
"movl\t%%edi, %%edi\nleaq\t(%%r15,%%rdi), %%rdi\n"
@@ -20266,7 +20266,7 @@
(clobber (match_operand:DI 2 "register_operand" "=c"))]
"TARGET_64BIT"
{
- if (flag_control_integrity)
+ if (TARGET_NACL)
{
return "movl\t%%esi, %%esi\nleaq\t(%%r15,%%rsi), %%rsi\n"
"movl\t%%edi, %%edi\nleaq\t(%%r15,%%rdi), %%rdi\n"
@@ -20339,7 +20339,7 @@
(clobber (reg:CC FLAGS_REG))]
"TARGET_64BIT"
{
- if (flag_control_integrity)
+ if (TARGET_NACL)
{
/* Note: %rdi is used, but in reality it's memory read, not store */
return "movl\t%%edi, %%edi\nleaq\t(%%r15,%%rdi), %%rdi\n"
@@ -20917,7 +20917,7 @@
&& INTVAL (operands[2]) != -128)))
{
operands[2] = GEN_INT (-INTVAL (operands[2]));
- if (flag_control_integrity)
+ if (TARGET_NACL)
{
if (REGNO (operands[0]) == SP_REG)
{
@@ -20933,7 +20933,7 @@
return "sub{q}\t{%2, %0|%0, %2}";
}
}
- else if (flag_control_integrity)
+ else if (TARGET_NACL)
{
if (REGNO (operands[0]) == SP_REG)
{
@@ -20951,7 +20951,7 @@
gcc_unreachable ();
case TYPE_LEA:
- if (flag_control_integrity)
+ if (TARGET_NACL)
{
if ((REGNO (operands[0]) != SP_REG)
&& (REGNO (operands[0]) != BP_REG))
@@ -22391,7 +22391,7 @@
(use (match_operand:DI 1 "register_operand" "r"))
(use (match_operand:DI 2 "const_int_operand" "i"))
(use (label_ref:DI (match_operand 3 "" "X")))]
- "TARGET_64BIT && !flag_control_integrity
+ "TARGET_64BIT && !TARGET_NACL
&& INTVAL (operands[4]) + X86_64_SSE_REGPARM_MAX * 16 - 16 < 128
&& INTVAL (operands[4]) + INTVAL (operands[2]) * 16 >= -128"
{
@@ -22455,7 +22455,7 @@
(reg:DI 27)
(reg:DI 28)] UNSPEC_SSE_PROLOGUE_SAVE))
(use (match_operand:DI 1 "const_int_operand" "i"))]
- "TARGET_64BIT && flag_control_integrity
+ "TARGET_64BIT && TARGET_NACL
&& INTVAL (operands[2]) + X86_64_SSE_REGPARM_MAX * 16 - 16 < 128
&& INTVAL (operands[2]) + INTVAL (operands[1]) * 16 >= -128"
{
« gcc/gcc/cfgrtl.c ('K') | « gcc/gcc/config/i386/i386.c ('k') | gcc/gcc/varasm.c » ('j') | no next file with comments »

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