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Issue 2848021: ARM: Fix bug introduced in 4783 (2.2.15) that caused the... (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: Created 10 years, 6 months ago
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1 // Copyright 2010 the V8 project authors. All rights reserved. 1 // Copyright 2010 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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962 } 962 }
963 break; 963 break;
964 } 964 }
965 965
966 // For these operations there is no optimistic operation that needs to be 966 // For these operations there is no optimistic operation that needs to be
967 // reverted. 967 // reverted.
968 case Token::MUL: 968 case Token::MUL:
969 case Token::MOD: 969 case Token::MOD:
970 case Token::BIT_OR: 970 case Token::BIT_OR:
971 case Token::BIT_XOR: 971 case Token::BIT_XOR:
972 case Token::BIT_AND: { 972 case Token::BIT_AND:
973 if (reversed_) { 973 case Token::SHL:
974 if (tos_register_.is(r0)) { 974 case Token::SHR:
975 __ mov(r1, Operand(Smi::FromInt(value_))); 975 case Token::SAR: {
976 } else { 976 if (tos_register_.is(r1)) {
977 ASSERT(tos_register_.is(r1)); 977 __ mov(r0, Operand(Smi::FromInt(value_)));
978 __ mov(r0, Operand(Smi::FromInt(value_))); 978 } else {
979 ASSERT(tos_register_.is(r0));
980 __ mov(r1, Operand(Smi::FromInt(value_)));
981 }
982 if (reversed_ == tos_register_.is(r1)) {
979 lhs = r0; 983 lhs = r0;
980 rhs = r1; 984 rhs = r1;
981 }
982 } else {
983 if (tos_register_.is(r1)) {
984 __ mov(r0, Operand(Smi::FromInt(value_)));
985 } else {
986 ASSERT(tos_register_.is(r0));
987 __ mov(r1, Operand(Smi::FromInt(value_)));
988 lhs = r0;
989 rhs = r1;
990 }
991 } 985 }
992 break; 986 break;
993 } 987 }
994 988
995 case Token::SHL:
996 case Token::SHR:
997 case Token::SAR: {
998 if (!reversed_) {
999 if (tos_register_.is(r1)) {
1000 __ mov(r0, Operand(Smi::FromInt(value_)));
1001 } else {
1002 ASSERT(tos_register_.is(r0));
1003 __ mov(r1, Operand(Smi::FromInt(value_)));
1004 lhs = r0;
1005 rhs = r1;
1006 }
1007 } else {
1008 ASSERT(op_ == Token::SHL);
1009 __ mov(r1, Operand(Smi::FromInt(value_)));
1010 }
1011 break;
1012 }
1013
1014 default: 989 default:
1015 // Other cases should have been handled before this point. 990 // Other cases should have been handled before this point.
1016 UNREACHABLE(); 991 UNREACHABLE();
1017 break; 992 break;
1018 } 993 }
1019 994
1020 GenericBinaryOpStub stub(op_, overwrite_mode_, lhs, rhs, value_); 995 GenericBinaryOpStub stub(op_, overwrite_mode_, lhs, rhs, value_);
1021 __ CallStub(&stub); 996 __ CallStub(&stub);
1022 // The generic stub returns its value in r0, but that's not 997 // The generic stub returns its value in r0, but that's not
1023 // necessarily what we want. We want whatever the inlined code 998 // necessarily what we want. We want whatever the inlined code
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10732 __ bind(&string_add_runtime); 10707 __ bind(&string_add_runtime);
10733 __ TailCallRuntime(Runtime::kStringAdd, 2, 1); 10708 __ TailCallRuntime(Runtime::kStringAdd, 2, 1);
10734 } 10709 }
10735 10710
10736 10711
10737 #undef __ 10712 #undef __
10738 10713
10739 } } // namespace v8::internal 10714 } } // namespace v8::internal
10740 10715
10741 #endif // V8_TARGET_ARCH_ARM 10716 #endif // V8_TARGET_ARCH_ARM
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