Add movw and movt support for ARMv7. This includes some code from...

test/cctest/test-disasm-arm.cc

 // Copyright 2007-2008 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 251 matching lines @@
   // mvn -> mov.
   COMPARE(mvn(r3, Operand(-1), LeaveCC, al),
           "e3a03000       mov r3, #0");
   COMPARE(mvn(r4, Operand(-2), SetCC, al),
           "e3b04001       movs r4, #1");
   COMPARE(mvn(r5, Operand(0x0ffffff0), SetCC, ne),
           "13b052ff       movnes r5, #-268435441");
   COMPARE(mvn(r6, Operand(-1), LeaveCC, ne),
           "13a06000       movne r6, #0");
 
+  // mov -> movw.
+  if (CpuFeatures::IsSupported(ARMv7)) {
+    COMPARE(mov(r5, Operand(0x01234), LeaveCC, ne),
+            "13015234       movwne r5, #4660");
+    // We only disassemble one instruction so the eor instruction is not here.
+    COMPARE(eor(r5, r4, Operand(0x1234), LeaveCC, ne),
+            "1301c234       movwne ip, #4660");
+    // Movw can't do setcc so we don't get that here.  Mov immediate with setcc
+    // is pretty strange anyway.
+    COMPARE(mov(r5, Operand(0x01234), SetCC, ne),
+            "159fc000       ldrne ip, [pc, #+0]");
+    // We only disassemble one instruction so the eor instruction is not here.
+    // The eor does the setcc so we get a movw here.
+    COMPARE(eor(r5, r4, Operand(0x1234), SetCC, ne),
+            "1301c234       movwne ip, #4660");
+  }
+
+  // Eor doesn't have an eor-negative variant, but we can do an mvn followed by
+  // an eor to get the same effect.
+  COMPARE(eor(r5, r4, Operand(0xffffff34), SetCC, ne),
+          "13e0c0cb       mvnne ip, #203");
+

[Søren Thygesen Gjesse, 2010/06/21 21:39:26]

Missing movt test?

   // and <-> bic.
   COMPARE(and_(r3, r5, Operand(0xfc03ffff)),
           "e3c537ff       bic r3, r5, #66846720");
   COMPARE(bic(r3, r5, Operand(0xfc03ffff)),
           "e20537ff       and r3, r5, #66846720");
 
   // sub <-> add.
   COMPARE(add(r3, r5, Operand(-1024)),
           "e2453b01       sub r3, r5, #1024");
   COMPARE(sub(r3, r5, Operand(-1024)),
@@ skipping 85 matching lines @@
             "e7ce1290       bfi r1, r0, #5, #10");
     COMPARE(bfi(r0, r1, 31, 1),
             "e7df0f91       bfi r0, r1, #31, #1");
     COMPARE(bfi(r1, r0, 31, 1),
             "e7df1f90       bfi r1, r0, #31, #1");
   }
 
   VERIFY_RUN();
 }