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1 // Copyright 2007-2008 the V8 project authors. All rights reserved. | 1 // Copyright 2007-2008 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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917 *data == 0x6B ? *(data+2) : *reinterpret_cast<int32_t*>(data+2); | 917 *data == 0x6B ? *(data+2) : *reinterpret_cast<int32_t*>(data+2); |
918 AppendToBuffer("imul %s,%s,0x%x", | 918 AppendToBuffer("imul %s,%s,0x%x", |
919 NameOfCPURegister(regop), | 919 NameOfCPURegister(regop), |
920 NameOfCPURegister(rm), | 920 NameOfCPURegister(rm), |
921 imm); | 921 imm); |
922 data += 2 + (*data == 0x6B ? 1 : 4); | 922 data += 2 + (*data == 0x6B ? 1 : 4); |
923 } | 923 } |
924 break; | 924 break; |
925 | 925 |
926 case 0xF6: | 926 case 0xF6: |
927 { int mod, regop, rm; | 927 { data++; |
928 get_modrm(*(data+1), &mod, ®op, &rm); | 928 int mod, regop, rm; |
929 if (mod == 3 && regop == eax) { | 929 get_modrm(*data, &mod, ®op, &rm); |
930 AppendToBuffer("test_b %s,%d", NameOfCPURegister(rm), *(data+2)); | 930 if (regop == eax) { |
| 931 AppendToBuffer("test_b "); |
| 932 data += PrintRightOperand(data); |
| 933 int32_t imm = *data; |
| 934 AppendToBuffer(",0x%x", imm); |
| 935 data++; |
931 } else { | 936 } else { |
932 UnimplementedInstruction(); | 937 UnimplementedInstruction(); |
933 } | 938 } |
934 data += 3; | |
935 } | 939 } |
936 break; | 940 break; |
937 | 941 |
938 case 0x81: // fall through | 942 case 0x81: // fall through |
939 case 0x83: // 0x81 with sign extension bit set | 943 case 0x83: // 0x81 with sign extension bit set |
940 data += PrintImmediateOp(data); | 944 data += PrintImmediateOp(data); |
941 break; | 945 break; |
942 | 946 |
943 case 0x0F: | 947 case 0x0F: |
944 { byte f0byte = *(data+1); | 948 { byte f0byte = *(data+1); |
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1458 fprintf(f, " "); | 1462 fprintf(f, " "); |
1459 } | 1463 } |
1460 fprintf(f, " %s\n", buffer.start()); | 1464 fprintf(f, " %s\n", buffer.start()); |
1461 } | 1465 } |
1462 } | 1466 } |
1463 | 1467 |
1464 | 1468 |
1465 } // namespace disasm | 1469 } // namespace disasm |
1466 | 1470 |
1467 #endif // V8_TARGET_ARCH_IA32 | 1471 #endif // V8_TARGET_ARCH_IA32 |
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