Implement transcendental cache probing in generated code on ARM....

Implement transcendental cache probing in generated code on ARM.

Fixed hash code computation on ia32 and x64 to match the runtime
system (change arithmetic shift right to logical shift right).


Committed: http://code.google.com/p/v8/source/detail?r=4843

[Rodolph Perfetta, 2010-06-10 19:30:45]

http://codereview.chromium.org/2731007/diff/7002/17001
File src/arm/codegen-arm.cc (right):

http://codereview.chromium.org/2731007/diff/7002/17001#newcode8274
src/arm/codegen-arm.cc:8274: __ sub(r7, r0, Operand(kHeapObjectTag));
If you are not performing any FP operations then you are better off loading the
values straight into r1 and r2. Moving value between FP and ARM registers has a
cost.

http://codereview.chromium.org/2731007/diff/7002/17001#newcode8282
src/arm/codegen-arm.cc:8282: //   h = (low ^ high); h ^= h >> 16; h ^= h >> 8; h
= h & (cacheSize - 1);
The mov is unnecessary simply use r1 as a source operand in the following
instruction: eor(r3, r1, Operand(r2))

[Mads Ager (chromium), 2010-06-11 06:27:10]

http://codereview.chromium.org/2731007/diff/7002/17001
File src/arm/codegen-arm.cc (right):

http://codereview.chromium.org/2731007/diff/7002/17001#newcode8274
src/arm/codegen-arm.cc:8274: __ sub(r7, r0, Operand(kHeapObjectTag));
On 2010/06/10 19:30:46, rodolph.perfetta wrote:
> If you are not performing any FP operations then you are better off loading
the
> values straight into r1 and r2. Moving value between FP and ARM registers has
a
> cost.

Good point, thanks. I have changed it to directly load the values.

http://codereview.chromium.org/2731007/diff/7002/17001#newcode8282
src/arm/codegen-arm.cc:8282: //   h = (low ^ high); h ^= h >> 16; h ^= h >> 8; h
= h & (cacheSize - 1);
On 2010/06/10 19:30:46, rodolph.perfetta wrote:
> The mov is unnecessary simply use r1 as a source operand in the following
> instruction: eor(r3, r1, Operand(r2))

Done.

[Erik Corry, 2010-06-11 08:42:01]

LGTM

http://codereview.chromium.org/2731007/diff/23001/24001
File src/arm/codegen-arm.cc (right):

http://codereview.chromium.org/2731007/diff/23001/24001#newcode5093
src/arm/codegen-arm.cc:5093: frame_->CallStub(&stub, 1);
You could do
SpillAllButCopyTOSToR0()
and then have the calling convention for the stub be that the argument is passed
in R0 as well as on the stack.  The stub call will spill all anyway, but this
way you don't have to load r0 at the start of the stub.

http://codereview.chromium.org/2731007/diff/23001/24001#newcode8269
src/arm/codegen-arm.cc:8269: Factory::heap_number_map(),
It would be nice if we had an overloaded version of CheckMap that took a root
array index.

http://codereview.chromium.org/2731007/diff/23001/24001#newcode8285
src/arm/codegen-arm.cc:8285: __ and_(r3, r3,
Operand(TranscendentalCache::kCacheSize - 1));
This is anding with 511, which doesn't fit in the immediate field, so there's an
implicit pc-relative load into ip.  We could use the ubfx instruction on ARM7.

http://codereview.chromium.org/2731007/diff/23001/24001#newcode8296
src/arm/codegen-arm.cc:8296: __ tst(r0, Operand(r0));
Prefer cmp with immediate 0 here, since it doesn't do a partial flags update.

http://codereview.chromium.org/2731007/diff/23001/24001#newcode8318
src/arm/codegen-arm.cc:8318: __ ldr(r4, MemOperand(r0, 0));
Load r4, r5 and r6 with ldm?

http://codereview.chromium.org/2731007/diff/23001/24003
File src/ia32/codegen-ia32.cc (right):

http://codereview.chromium.org/2731007/diff/23001/24003#newcode10293
src/ia32/codegen-ia32.cc:10293: __ shr(eax, 16);
Oops!  Nice catch!

[Mads Ager (chromium), 2010-06-11 09:57:54]

http://codereview.chromium.org/2731007/diff/23001/24001
File src/arm/codegen-arm.cc (right):

http://codereview.chromium.org/2731007/diff/23001/24001#newcode5093
src/arm/codegen-arm.cc:5093: frame_->CallStub(&stub, 1);
On 2010/06/11 08:42:01, Erik Corry wrote:
> You could do
> SpillAllButCopyTOSToR0()
> and then have the calling convention for the stub be that the argument is
passed
> in R0 as well as on the stack.  The stub call will spill all anyway, but this
> way you don't have to load r0 at the start of the stub.

Done.

http://codereview.chromium.org/2731007/diff/23001/24001#newcode8269
src/arm/codegen-arm.cc:8269: Factory::heap_number_map(),
On 2010/06/11 08:42:01, Erik Corry wrote:
> It would be nice if we had an overloaded version of CheckMap that took a root
> array index.

Done and used in a couple of other places as well.

http://codereview.chromium.org/2731007/diff/23001/24001#newcode8285
src/arm/codegen-arm.cc:8285: __ and_(r3, r3,
Operand(TranscendentalCache::kCacheSize - 1));
On 2010/06/11 08:42:01, Erik Corry wrote:
> This is anding with 511, which doesn't fit in the immediate field, so there's
an
> implicit pc-relative load into ip.  We could use the ubfx instruction on ARM7.

Like it I do. Done.

http://codereview.chromium.org/2731007/diff/23001/24001#newcode8296
src/arm/codegen-arm.cc:8296: __ tst(r0, Operand(r0));
On 2010/06/11 08:42:01, Erik Corry wrote:
> Prefer cmp with immediate 0 here, since it doesn't do a partial flags update.

Done.

http://codereview.chromium.org/2731007/diff/23001/24001#newcode8318
src/arm/codegen-arm.cc:8318: __ ldr(r4, MemOperand(r0, 0));
On 2010/06/11 08:42:01, Erik Corry wrote:
> Load r4, r5 and r6 with ldm?

Done.