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1 /* | 1 /* |
2 * Copyright (c) 2004-2008 Atheros Communications Inc. | 2 * Copyright (c) 2004-2008 Atheros Communications Inc. |
3 * All rights reserved. | 3 * All rights reserved. |
4 * | 4 * |
5 * This file implements the Atheros PS and patch downloaded for HCI UART Transpo
rt driver. | 5 * This file implements the Atheros PS and patch downloaded for HCI UART Transpo
rt driver. |
6 * This file can be used for HCI SDIO transport implementation for AR6002 with H
CI_TRANSPORT_SDIO | 6 * This file can be used for HCI SDIO transport implementation for AR6002 with H
CI_TRANSPORT_SDIO |
7 * defined. | 7 * defined. |
8 * | 8 * |
9 * | 9 * |
10 * ar3kcpsconfig.c | 10 * ar3kcpsconfig.c |
(...skipping 122 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
133 const struct firmware* firmware; | 133 const struct firmware* firmware; |
134 A_UINT32 numCmds; | 134 A_UINT32 numCmds; |
135 A_UINT8 *event; | 135 A_UINT8 *event; |
136 A_UINT8 *bufferToFree; | 136 A_UINT8 *bufferToFree; |
137 struct hci_dev *device; | 137 struct hci_dev *device; |
138 A_UCHAR *buffer; | 138 A_UCHAR *buffer; |
139 A_UINT32 len; | 139 A_UINT32 len; |
140 A_UINT32 DevType; | 140 A_UINT32 DevType; |
141 A_UCHAR *PsFileName; | 141 A_UCHAR *PsFileName; |
142 A_UCHAR *patchFileName; | 142 A_UCHAR *patchFileName; |
| 143 A_UCHAR path[256]; |
| 144 A_UCHAR config_path[256]; |
143 AR3K_CONFIG_INFO *hdev = (AR3K_CONFIG_INFO*)arg; | 145 AR3K_CONFIG_INFO *hdev = (AR3K_CONFIG_INFO*)arg; |
144 struct device *firmwareDev = NULL; | 146 struct device *firmwareDev = NULL; |
145 status = 0; | 147 status = 0; |
146 HciCmdList = NULL; | 148 HciCmdList = NULL; |
147 #ifdef HCI_TRANSPORT_SDIO | 149 #ifdef HCI_TRANSPORT_SDIO |
148 device = hdev->pBtStackHCIDev; | 150 device = hdev->pBtStackHCIDev; |
149 firmwareDev = device->parent; | 151 firmwareDev = device->parent; |
150 #else | 152 #else |
151 device = hdev; | 153 device = hdev; |
152 firmwareDev = &device->dev; | 154 firmwareDev = &device->dev; |
153 AthEnableSyncCommandOp(TRUE); | 155 AthEnableSyncCommandOp(TRUE); |
154 #endif /* HCI_TRANSPORT_SDIO */ | 156 #endif /* HCI_TRANSPORT_SDIO */ |
155 /* First verify if the controller is an FPGA or ASIC, so depending on the de
vice type the PS file to be written will be different. | 157 /* First verify if the controller is an FPGA or ASIC, so depending on the de
vice type the PS file to be written will be different. |
156 */ | 158 */ |
157 if(A_ERROR == getDeviceType(hdev,&DevType)) { | 159 if(A_ERROR == getDeviceType(hdev,&DevType)) { |
158 status = 1; | 160 status = 1; |
159 goto complete; | 161 goto complete; |
160 } | 162 } |
161 if(A_ERROR == ReadVersionInfo(hdev)) { | 163 if(A_ERROR == ReadVersionInfo(hdev)) { |
162 status = 1; | 164 status = 1; |
163 goto complete; | 165 goto complete; |
164 } | 166 } |
165 patchFileName = PATCH_FILE; | 167 patchFileName = PATCH_FILE; |
| 168 snprintf(path, sizeof(path), "%s/%xcoex/",CONFIG_PATH,Rom_Version); |
166 if(DevType){ | 169 if(DevType){ |
167 if(DevType == 0xdeadc0de){ | 170 if(DevType == 0xdeadc0de){ |
168 PsFileName = PS_ASIC_FILE; | 171 PsFileName = PS_ASIC_FILE; |
169 } else{ | 172 } else{ |
170 » » AR_DEBUG_PRINTF(ATH_DEBUG_ERR,(" FPGA Test Image : %x %x \n",Ro
m_Version,Build_Version)); | 173 » » AR_DEBUG_PRINTF(ATH_DEBUG_ERR,(" FPGA Test Image : %x %x \n",Ro
m_Version,Build_Version)); |
171 if((Rom_Version == 0x99999999) && (Build_Version == 1)){ | 174 if((Rom_Version == 0x99999999) && (Build_Version == 1)){ |
172 | 175 |
173 » » » AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("FPGA Test Image : Skippi
ng Patch File load\n")); | 176 » » » AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("FPGA Test Image : Skippi
ng Patch File load\n")); |
174 » » » patchFileName = NULL; | 177 » » » patchFileName = NULL; |
175 } | 178 } |
176 PsFileName = PS_FPGA_FILE; | 179 PsFileName = PS_FPGA_FILE; |
177 } | 180 } |
178 } | 181 } |
179 else{ | 182 else{ |
180 PsFileName = PS_ASIC_FILE; | 183 PsFileName = PS_ASIC_FILE; |
181 } | 184 } |
182 | 185 |
183 AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("%x: FPGA/ASIC PS File Name %s\n", DevType,Ps
FileName)); | 186 snprintf(config_path, sizeof(config_path), "%s%s",path,PsFileName); |
| 187 AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("%x: FPGA/ASIC PS File Name %s\n", DevType,co
nfig_path)); |
184 /* Read the PS file to a dynamically allocated buffer */ | 188 /* Read the PS file to a dynamically allocated buffer */ |
185 if(request_firmware(&firmware,PsFileName,firmwareDev) < 0) { | 189 if(request_firmware(&firmware,config_path,firmwareDev) < 0) { |
186 AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("%s: firmware file open error\n", __FUNCT
ION__ )); | 190 AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("%s: firmware file open error\n", __FUNCT
ION__ )); |
187 status = 1; | 191 status = 1; |
188 goto complete; | 192 goto complete; |
189 | 193 |
190 } | 194 } |
191 if(NULL == firmware || firmware->size == 0) { | 195 if(NULL == firmware || firmware->size == 0) { |
192 status = 1; | 196 status = 1; |
193 goto complete; | 197 goto complete; |
194 } | 198 } |
195 buffer = (A_UCHAR *)A_MALLOC(firmware->size); | 199 buffer = (A_UCHAR *)A_MALLOC(firmware->size); |
196 if(buffer != NULL) { | 200 if(buffer != NULL) { |
197 /* Copy the read file to a local Dynamic buffer */ | 201 /* Copy the read file to a local Dynamic buffer */ |
198 memcpy(buffer,firmware->data,firmware->size); | 202 memcpy(buffer,firmware->data,firmware->size); |
199 len = firmware->size; | 203 len = firmware->size; |
200 release_firmware(firmware); | 204 release_firmware(firmware); |
201 /* Parse the PS buffer to a global variable */ | 205 /* Parse the PS buffer to a global variable */ |
202 status = AthDoParsePS(buffer,len); | 206 status = AthDoParsePS(buffer,len); |
203 A_FREE(buffer); | 207 A_FREE(buffer); |
204 } else { | 208 } else { |
205 release_firmware(firmware); | 209 release_firmware(firmware); |
206 } | 210 } |
207 | 211 |
208 | 212 |
209 /* Read the patch file to a dynamically allocated buffer */ | 213 /* Read the patch file to a dynamically allocated buffer */ |
210 if((patchFileName == NULL) || (request_firmware(&firmware,patchFileName,firm
wareDev) < 0)) { | 214 » if(patchFileName != NULL) |
| 215 » » snprintf(config_path, |
| 216 » » » sizeof(config_path), "%s%s",path,patchFileName); |
| 217 » else { |
| 218 » » status = 0; |
| 219 » } |
| 220 AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("Patch File Name %s\n", config_path)); |
| 221 if((patchFileName == NULL) || (request_firmware(&firmware,config_path,firmwa
reDev) < 0)) { |
211 AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("%s: firmware file open error\n", __FUNCT
ION__ )); | 222 AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("%s: firmware file open error\n", __FUNCT
ION__ )); |
212 /* | 223 /* |
213 * It is not necessary that Patch file be available, continue with PS O
perations if. | 224 * It is not necessary that Patch file be available, continue with PS O
perations if. |
214 * failed. | 225 * failed. |
215 */ | 226 */ |
216 status = 0; | 227 status = 0; |
217 | 228 |
218 } else { | 229 } else { |
219 if(NULL == firmware || firmware->size == 0) { | 230 if(NULL == firmware || firmware->size == 0) { |
220 status = 0; | 231 status = 0; |
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295 goto complete; | 306 goto complete; |
296 } | 307 } |
297 } | 308 } |
298 #ifndef HCI_TRANSPORT_SDIO | 309 #ifndef HCI_TRANSPORT_SDIO |
299 if(bdaddr[0] != '\0') { | 310 if(bdaddr[0] != '\0') { |
300 write_bdaddr(hdev,bdaddr); | 311 write_bdaddr(hdev,bdaddr); |
301 } else | 312 } else |
302 #endif /* HCI_TRANSPORT_SDIO */ | 313 #endif /* HCI_TRANSPORT_SDIO */ |
303 { | 314 { |
304 /* Read Contents of BDADDR file if user has not provided any op
tion */ | 315 /* Read Contents of BDADDR file if user has not provided any op
tion */ |
305 » if(request_firmware(&firmware,BDADDR_FILE,firmwareDev) < 0) { | 316 » » sprintf(config_path,"%s%s",path,BDADDR_FILE); |
306 » AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("%s: firmware file open error\n",
__FUNCTION__ )); | 317 » AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("Patch File Name %s\n", config_path)); |
307 » status = 1; | 318 » if(request_firmware(&firmware,config_path,firmwareDev) < 0) { |
308 » goto complete; | 319 » » AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("%s: firmware file open error\n",
__FUNCTION__ )); |
309 » } | 320 » » status = 1; |
310 » if(NULL == firmware || firmware->size == 0) { | 321 » » goto complete; |
311 » status = 1; | 322 » } |
312 » goto complete; | 323 » if(NULL == firmware || firmware->size == 0) { |
313 » } | 324 » » status = 1; |
| 325 » » goto complete; |
| 326 » } |
314 write_bdaddr(hdev,(A_UCHAR *)firmware->data); | 327 write_bdaddr(hdev,(A_UCHAR *)firmware->data); |
315 »release_firmware(firmware); | 328 » release_firmware(firmware); |
316 } | 329 } |
317 complete: | 330 complete: |
318 #ifndef HCI_TRANSPORT_SDIO | 331 #ifndef HCI_TRANSPORT_SDIO |
319 AthEnableSyncCommandOp(FALSE); | 332 AthEnableSyncCommandOp(FALSE); |
320 PSTagMode = FALSE; | 333 PSTagMode = FALSE; |
321 wake_up_interruptible(&PsCompleteEvent); | 334 wake_up_interruptible(&PsCompleteEvent); |
322 #endif /* HCI_TRANSPORT_SDIO */ | 335 #endif /* HCI_TRANSPORT_SDIO */ |
323 if(NULL != HciCmdList) { | 336 if(NULL != HciCmdList) { |
324 AthFreeCommandList(&HciCmdList,numCmds); | 337 AthFreeCommandList(&HciCmdList,numCmds); |
325 } | 338 } |
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497 } | 510 } |
498 | 511 |
499 } | 512 } |
500 if(bufferToFree != NULL) { | 513 if(bufferToFree != NULL) { |
501 A_FREE(bufferToFree); | 514 A_FREE(bufferToFree); |
502 } | 515 } |
503 return result; | 516 return result; |
504 } | 517 } |
505 | 518 |
506 | 519 |
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