DescriptionInitial port of top-level code generator to ARM. For the constant
true at the top level we generate:
0 stmdb sp!, {r1, r8, fp, lr}
4 add fp, sp, #8
8 ldr ip, [r10, #+4]
12 ldr r2, [r10, #+0]
16 str ip, [sp, #-4]!
20 add lr, pc, #4
24 cmp sp, r2
28 ldrcc pc, [pc, #+68] ;; code: STUB, StackCheck, minor: 0
32 ldr ip, [pc, #+68] ;; object: 0xf5bc4161 <true>
36 str ip, [sp, #-4]!
40 ldr ip, [sp, #+0]
44 str ip, [fp, #-12]
48 add sp, sp, #4
52 ldr ip, [fp, #-12]
56 str ip, [sp, #-4]!
60 ldr r0, [sp], #+4
64 mov sp, fp ;; js return
68 ldmia sp!, {fp, lr}
72 add sp, sp, #4
76 bx lr
80 ldr r0, [r10, #+4]
84 mov sp, fp ;; js return
88 ldmia sp!, {fp, lr}
92 add sp, sp, #4
96 bx lr
100 constant pool begin
104 constant
108 constant
Committed: http://code.google.com/p/v8/source/detail?r=3073
Patch Set 1 #
Total comments: 1
Patch Set 2 : '' #
Messages
Total messages: 3 (0 generated)
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