Change clamping 0..255 instruction sequence for pixel array code

src/x64/assembler-x64.h

 // Copyright (c) 1994-2006 Sun Microsystems Inc.
 // All Rights Reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 // - Redistributions of source code must retain the above copyright notice,
 // this list of conditions and the following disclaimer.
 //
@@ skipping 685 matching lines @@
   }
 
   void andl(Register dst, Immediate src) {
     immediate_arithmetic_op_32(0x4, dst, src);
   }
 
   void decq(Register dst);
   void decq(const Operand& dst);
   void decl(Register dst);
   void decl(const Operand& dst);
+  void decb(Register dst);
+  void decb(const Operand& dst);
 
   // Sign-extends rax into rdx:rax.
   void cqo();
   // Sign-extends eax into edx:eax.
   void cdq();
 
   // Divide rdx:rax by src.  Quotient in rax, remainder in rdx.
   void idivq(Register src);
   // Divide edx:eax by lower 32 bits of src.  Quotient in eax, rem. in edx.
   void idivl(Register src);
@@ skipping 599 matching lines @@
  private:
   Assembler* assembler_;
 #ifdef DEBUG
   int space_before_;
 #endif
 };
 
 } }  // namespace v8::internal
 
 #endif  // V8_X64_ASSEMBLER_X64_H_