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Side by Side Diff: src/arm/assembler-arm-inl.h

Issue 2218002: The way reloc entries are visited by the ObjectVisitor is architecture... (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: '' Created 10 years, 7 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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32 32
33 // The original source code covered by the above license above has been modified 33 // The original source code covered by the above license above has been modified
34 // significantly by Google Inc. 34 // significantly by Google Inc.
35 // Copyright 2006-2008 the V8 project authors. All rights reserved. 35 // Copyright 2006-2008 the V8 project authors. All rights reserved.
36 36
37 #ifndef V8_ARM_ASSEMBLER_ARM_INL_H_ 37 #ifndef V8_ARM_ASSEMBLER_ARM_INL_H_
38 #define V8_ARM_ASSEMBLER_ARM_INL_H_ 38 #define V8_ARM_ASSEMBLER_ARM_INL_H_
39 39
40 #include "arm/assembler-arm.h" 40 #include "arm/assembler-arm.h"
41 #include "cpu.h" 41 #include "cpu.h"
42 #include "debug.h"
42 43
43 44
44 namespace v8 { 45 namespace v8 {
45 namespace internal { 46 namespace internal {
46 47
47 Condition NegateCondition(Condition cc) { 48 Condition NegateCondition(Condition cc) {
48 ASSERT(cc != al); 49 ASSERT(cc != al);
49 return static_cast<Condition>(cc ^ ne); 50 return static_cast<Condition>(cc ^ ne);
50 } 51 }
51 52
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66 return Assembler::target_address_at(pc_); 67 return Assembler::target_address_at(pc_);
67 } 68 }
68 69
69 70
70 Address RelocInfo::target_address_address() { 71 Address RelocInfo::target_address_address() {
71 ASSERT(IsCodeTarget(rmode_) || rmode_ == RUNTIME_ENTRY); 72 ASSERT(IsCodeTarget(rmode_) || rmode_ == RUNTIME_ENTRY);
72 return reinterpret_cast<Address>(Assembler::target_address_address_at(pc_)); 73 return reinterpret_cast<Address>(Assembler::target_address_address_at(pc_));
73 } 74 }
74 75
75 76
77 int RelocInfo::target_address_size() {
78 return Assembler::kExternalTargetSize;
79 }
80
81
76 void RelocInfo::set_target_address(Address target) { 82 void RelocInfo::set_target_address(Address target) {
77 ASSERT(IsCodeTarget(rmode_) || rmode_ == RUNTIME_ENTRY); 83 ASSERT(IsCodeTarget(rmode_) || rmode_ == RUNTIME_ENTRY);
78 Assembler::set_target_address_at(pc_, target); 84 Assembler::set_target_address_at(pc_, target);
79 } 85 }
80 86
81 87
82 Object* RelocInfo::target_object() { 88 Object* RelocInfo::target_object() {
83 ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT); 89 ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
84 return Memory::Object_at(Assembler::target_address_address_at(pc_)); 90 return Memory::Object_at(Assembler::target_address_address_at(pc_));
85 } 91 }
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155 #else 161 #else
156 // A patched return sequence is: 162 // A patched return sequence is:
157 // mov lr, pc 163 // mov lr, pc
158 // ldr pc, [pc, #-4] 164 // ldr pc, [pc, #-4]
159 return (current_instr == kMovLrPc) 165 return (current_instr == kMovLrPc)
160 && ((next_instr & kLdrPCMask) == kLdrPCPattern); 166 && ((next_instr & kLdrPCMask) == kLdrPCPattern);
161 #endif 167 #endif
162 } 168 }
163 169
164 170
171 void RelocInfo::Visit(ObjectVisitor* visitor) {
172 RelocInfo::Mode mode = rmode();
173 if (mode == RelocInfo::EMBEDDED_OBJECT) {
174 visitor->VisitPointer(target_object_address());
175 } else if (RelocInfo::IsCodeTarget(mode)) {
176 visitor->VisitCodeTarget(this);
177 } else if (mode == RelocInfo::EXTERNAL_REFERENCE) {
178 visitor->VisitExternalReference(target_reference_address());
179 #ifdef ENABLE_DEBUGGER_SUPPORT
180 } else if (Debug::has_break_points() &&
181 RelocInfo::IsJSReturn(mode) &&
182 IsPatchedReturnSequence()) {
183 visitor->VisitDebugTarget(this);
184 #endif
185 } else if (mode == RelocInfo::RUNTIME_ENTRY) {
186 visitor->VisitRuntimeEntry(this);
187 }
188 }
189
190
165 Operand::Operand(int32_t immediate, RelocInfo::Mode rmode) { 191 Operand::Operand(int32_t immediate, RelocInfo::Mode rmode) {
166 rm_ = no_reg; 192 rm_ = no_reg;
167 imm32_ = immediate; 193 imm32_ = immediate;
168 rmode_ = rmode; 194 rmode_ = rmode;
169 } 195 }
170 196
171 197
172 Operand::Operand(const ExternalReference& f) { 198 Operand::Operand(const ExternalReference& f) {
173 rm_ = no_reg; 199 rm_ = no_reg;
174 imm32_ = reinterpret_cast<int32_t>(f.address()); 200 imm32_ = reinterpret_cast<int32_t>(f.address());
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266 // CPU::FlushICache(pc, sizeof(target)); 292 // CPU::FlushICache(pc, sizeof(target));
267 // However, on ARM, no instruction was actually patched by the assignment 293 // However, on ARM, no instruction was actually patched by the assignment
268 // above; the target address is not part of an instruction, it is patched in 294 // above; the target address is not part of an instruction, it is patched in
269 // the constant pool and is read via a data access; the instruction accessing 295 // the constant pool and is read via a data access; the instruction accessing
270 // this address in the constant pool remains unchanged. 296 // this address in the constant pool remains unchanged.
271 } 297 }
272 298
273 } } // namespace v8::internal 299 } } // namespace v8::internal
274 300
275 #endif // V8_ARM_ASSEMBLER_ARM_INL_H_ 301 #endif // V8_ARM_ASSEMBLER_ARM_INL_H_
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