Issue 21536: Improve generated code for non-smi bit operations by...

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Issue 21536: Improve generated code for non-smi bit operations by... (Closed)

Created:
11 years, 10 months ago by Kasper Lund

Modified:
9 years, 7 months ago

Reviewers:
Erik Corry, Mads Ager (chromium)

CC:
v8-dev

Base URL:
http://v8.googlecode.com/svn/branches/bleeding_edge/

Visibility:
Public.

Description

Improve generated code for non-smi bit operations by converting the operands to 32-bit ints directly in the machine code stub instead of just checking if the heap numbers really just represent 32-bit ints and going through the runtime system in that case. Committed: http://code.google.com/p/v8/source/detail?r=1330

Patch Set 1 #

Patch Set 2 : '' #

Total comments: 1

Created: 11 years, 10 months ago

Download [raw] [tar.bz2]

	Unified diffs	Side-by-side diffs	Delta from patch set	Stats (+162 lines, -18 lines)			Patch
M	src/assembler-ia32.h	View		2 chunks	+3 lines, -0 lines	0 comments	Download
M	src/assembler-ia32.cc	View		2 chunks	+16 lines, -0 lines	0 comments	Download
M	src/codegen-ia32.cc	View	1	2 chunks	+51 lines, -18 lines	1 comment	Download
M	test/mjsunit/toint32.js	View		1 chunk	+92 lines, -0 lines	0 comments	Download

Messages

Total messages: 3 (0 generated)

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Erik Corry

11 years, 10 months ago (2009-02-20 16:40:41 UTC) #3

http://codereview.chromium.org/21536/diff/7/10
File src/codegen-ia32.cc (right):

http://codereview.chromium.org/21536/diff/7/10#newcode4520
Line 4520: __ fisttp_d(Operand(esp, 2 * kPointerSize));
This is an SSE3 instruction :-(.  I guess we can still use it but not in
snapshots and not without checking for SSE3.  See the Exceptions section of the
Intel documentation where it says it throws UD if the SSE3 bit is not set.

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