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1 // Copyright 2009 the V8 project authors. All rights reserved. | 1 // Copyright 2009 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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795 } else { | 795 } else { |
796 movq(dst, src1); | 796 movq(dst, src1); |
797 subq(dst, src2); | 797 subq(dst, src2); |
798 j(overflow, on_not_smi_result); | 798 j(overflow, on_not_smi_result); |
799 } | 799 } |
800 } | 800 } |
801 | 801 |
802 | 802 |
803 void MacroAssembler::SmiSub(Register dst, | 803 void MacroAssembler::SmiSub(Register dst, |
804 Register src1, | 804 Register src1, |
805 Operand const& src2, | 805 const Operand& src2, |
806 Label* on_not_smi_result) { | 806 Label* on_not_smi_result) { |
807 if (on_not_smi_result == NULL) { | 807 if (on_not_smi_result == NULL) { |
808 // No overflow checking. Use only when it's known that | 808 // No overflow checking. Use only when it's known that |
809 // overflowing is impossible (e.g., subtracting two positive smis). | 809 // overflowing is impossible (e.g., subtracting two positive smis). |
810 if (dst.is(src1)) { | 810 if (dst.is(src1)) { |
811 subq(dst, src2); | 811 subq(dst, src2); |
812 } else { | 812 } else { |
813 movq(dst, src1); | 813 movq(dst, src1); |
814 subq(dst, src2); | 814 subq(dst, src2); |
815 } | 815 } |
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913 | 913 |
914 Move(kScratchRegister, constant); | 914 Move(kScratchRegister, constant); |
915 addq(dst, kScratchRegister); | 915 addq(dst, kScratchRegister); |
916 } else { | 916 } else { |
917 Move(dst, constant); | 917 Move(dst, constant); |
918 addq(dst, src); | 918 addq(dst, src); |
919 } | 919 } |
920 } | 920 } |
921 | 921 |
922 | 922 |
| 923 void MacroAssembler::SmiAddConstant(const Operand& dst, Smi* constant) { |
| 924 if (constant->value() != 0) { |
| 925 Move(kScratchRegister, constant); |
| 926 addq(dst, kScratchRegister); |
| 927 } |
| 928 } |
| 929 |
| 930 |
923 void MacroAssembler::SmiAddConstant(Register dst, | 931 void MacroAssembler::SmiAddConstant(Register dst, |
924 Register src, | 932 Register src, |
925 Smi* constant, | 933 Smi* constant, |
926 Label* on_not_smi_result) { | 934 Label* on_not_smi_result) { |
927 if (constant->value() == 0) { | 935 if (constant->value() == 0) { |
928 if (!dst.is(src)) { | 936 if (!dst.is(src)) { |
929 movq(dst, src); | 937 movq(dst, src); |
930 } | 938 } |
931 } else if (dst.is(src)) { | 939 } else if (dst.is(src)) { |
932 ASSERT(!dst.is(kScratchRegister)); | 940 ASSERT(!dst.is(kScratchRegister)); |
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2761 CPU::FlushICache(address_, size_); | 2769 CPU::FlushICache(address_, size_); |
2762 | 2770 |
2763 // Check that the code was patched as expected. | 2771 // Check that the code was patched as expected. |
2764 ASSERT(masm_.pc_ == address_ + size_); | 2772 ASSERT(masm_.pc_ == address_ + size_); |
2765 ASSERT(masm_.reloc_info_writer.pos() == address_ + size_ + Assembler::kGap); | 2773 ASSERT(masm_.reloc_info_writer.pos() == address_ + size_ + Assembler::kGap); |
2766 } | 2774 } |
2767 | 2775 |
2768 } } // namespace v8::internal | 2776 } } // namespace v8::internal |
2769 | 2777 |
2770 #endif // V8_TARGET_ARCH_X64 | 2778 #endif // V8_TARGET_ARCH_X64 |
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