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1 // Copyright 2010 the V8 project authors. All rights reserved. | 1 // Copyright 2010 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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2024 if (instr->HasL()) { | 2024 if (instr->HasL()) { |
2025 set_register(rd, ReadW(addr, instr)); | 2025 set_register(rd, ReadW(addr, instr)); |
2026 } else { | 2026 } else { |
2027 WriteW(addr, get_register(rd), instr); | 2027 WriteW(addr, get_register(rd), instr); |
2028 } | 2028 } |
2029 } | 2029 } |
2030 } | 2030 } |
2031 | 2031 |
2032 | 2032 |
2033 void Simulator::DecodeType3(Instr* instr) { | 2033 void Simulator::DecodeType3(Instr* instr) { |
2034 ASSERT(instr->Bits(6, 4) == 0x5 || instr->Bit(4) == 0); | |
2035 int rd = instr->RdField(); | 2034 int rd = instr->RdField(); |
2036 int rn = instr->RnField(); | 2035 int rn = instr->RnField(); |
2037 int32_t rn_val = get_register(rn); | 2036 int32_t rn_val = get_register(rn); |
2038 bool shifter_carry_out = 0; | 2037 bool shifter_carry_out = 0; |
2039 int32_t shifter_operand = GetShiftRm(instr, &shifter_carry_out); | 2038 int32_t shifter_operand = GetShiftRm(instr, &shifter_carry_out); |
2040 int32_t addr = 0; | 2039 int32_t addr = 0; |
2041 switch (instr->PUField()) { | 2040 switch (instr->PUField()) { |
2042 case 0: { | 2041 case 0: { |
2043 ASSERT(!instr->HasW()); | 2042 ASSERT(!instr->HasW()); |
2044 Format(instr, "'memop'cond'b 'rd, ['rn], -'shift_rm"); | 2043 Format(instr, "'memop'cond'b 'rd, ['rn], -'shift_rm"); |
2045 break; | 2044 break; |
2046 } | 2045 } |
2047 case 1: { | 2046 case 1: { |
2048 ASSERT(!instr->HasW()); | 2047 ASSERT(!instr->HasW()); |
2049 Format(instr, "'memop'cond'b 'rd, ['rn], +'shift_rm"); | 2048 Format(instr, "'memop'cond'b 'rd, ['rn], +'shift_rm"); |
2050 break; | 2049 break; |
2051 } | 2050 } |
2052 case 2: { | 2051 case 2: { |
2053 // Format(instr, "'memop'cond'b 'rd, ['rn, -'shift_rm]'w"); | 2052 // Format(instr, "'memop'cond'b 'rd, ['rn, -'shift_rm]'w"); |
2054 addr = rn_val - shifter_operand; | 2053 addr = rn_val - shifter_operand; |
2055 if (instr->HasW()) { | 2054 if (instr->HasW()) { |
2056 set_register(rn, addr); | 2055 set_register(rn, addr); |
2057 } | 2056 } |
2058 break; | 2057 break; |
2059 } | 2058 } |
2060 case 3: { | 2059 case 3: { |
2061 // UBFX. | |
2062 if (instr->HasW() && (instr->Bits(6, 4) == 0x5)) { | 2060 if (instr->HasW() && (instr->Bits(6, 4) == 0x5)) { |
2063 uint32_t widthminus1 = static_cast<uint32_t>(instr->Bits(20, 16)); | 2061 uint32_t widthminus1 = static_cast<uint32_t>(instr->Bits(20, 16)); |
2064 uint32_t lsbit = static_cast<uint32_t>(instr->ShiftAmountField()); | 2062 uint32_t lsbit = static_cast<uint32_t>(instr->Bits(11, 7)); |
2065 uint32_t msbit = widthminus1 + lsbit; | 2063 uint32_t msbit = widthminus1 + lsbit; |
2066 if (msbit <= 31) { | 2064 if (msbit <= 31) { |
2067 uint32_t rm_val = | 2065 if (instr->Bit(22)) { |
2068 static_cast<uint32_t>(get_register(instr->RmField())); | 2066 // ubfx - unsigned bitfield extract. |
2069 uint32_t extr_val = rm_val << (31 - msbit); | 2067 uint32_t rm_val = |
2070 extr_val = extr_val >> (31 - widthminus1); | 2068 static_cast<uint32_t>(get_register(instr->RmField())); |
2071 set_register(instr->RdField(), extr_val); | 2069 uint32_t extr_val = rm_val << (31 - msbit); |
| 2070 extr_val = extr_val >> (31 - widthminus1); |
| 2071 set_register(instr->RdField(), extr_val); |
| 2072 } else { |
| 2073 // sbfx - signed bitfield extract. |
| 2074 int32_t rm_val = get_register(instr->RmField()); |
| 2075 int32_t extr_val = rm_val << (31 - msbit); |
| 2076 extr_val = extr_val >> (31 - widthminus1); |
| 2077 set_register(instr->RdField(), extr_val); |
| 2078 } |
| 2079 } else { |
| 2080 UNREACHABLE(); |
| 2081 } |
| 2082 return; |
| 2083 } else if (!instr->HasW() && (instr->Bits(6, 4) == 0x1)) { |
| 2084 uint32_t lsbit = static_cast<uint32_t>(instr->Bits(11, 7)); |
| 2085 uint32_t msbit = static_cast<uint32_t>(instr->Bits(20, 16)); |
| 2086 if (msbit >= lsbit) { |
| 2087 // bfc or bfi - bitfield clear/insert. |
| 2088 uint32_t rd_val = |
| 2089 static_cast<uint32_t>(get_register(instr->RdField())); |
| 2090 uint32_t bitcount = msbit - lsbit + 1; |
| 2091 uint32_t mask = (1 << bitcount) - 1; |
| 2092 rd_val &= ~(mask << lsbit); |
| 2093 if (instr->RmField() != 15) { |
| 2094 // bfi - bitfield insert. |
| 2095 uint32_t rm_val = |
| 2096 static_cast<uint32_t>(get_register(instr->RmField())); |
| 2097 rm_val &= mask; |
| 2098 rd_val |= rm_val << lsbit; |
| 2099 } |
| 2100 set_register(instr->RdField(), rd_val); |
2072 } else { | 2101 } else { |
2073 UNREACHABLE(); | 2102 UNREACHABLE(); |
2074 } | 2103 } |
2075 return; | 2104 return; |
2076 } else { | 2105 } else { |
2077 // Format(instr, "'memop'cond'b 'rd, ['rn, +'shift_rm]'w"); | 2106 // Format(instr, "'memop'cond'b 'rd, ['rn, +'shift_rm]'w"); |
2078 addr = rn_val + shifter_operand; | 2107 addr = rn_val + shifter_operand; |
2079 if (instr->HasW()) { | 2108 if (instr->HasW()) { |
2080 set_register(rn, addr); | 2109 set_register(rn, addr); |
2081 } | 2110 } |
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2728 uintptr_t address = *stack_slot; | 2757 uintptr_t address = *stack_slot; |
2729 set_register(sp, current_sp + sizeof(uintptr_t)); | 2758 set_register(sp, current_sp + sizeof(uintptr_t)); |
2730 return address; | 2759 return address; |
2731 } | 2760 } |
2732 | 2761 |
2733 } } // namespace assembler::arm | 2762 } } // namespace assembler::arm |
2734 | 2763 |
2735 #endif // __arm__ | 2764 #endif // __arm__ |
2736 | 2765 |
2737 #endif // V8_TARGET_ARCH_ARM | 2766 #endif // V8_TARGET_ARCH_ARM |
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