Push/pop is just one peephole optimization. Puth them all...

src/arm/assembler-arm.cc

 // Copyright (c) 1994-2006 Sun Microsystems Inc.
 // All Rights Reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions
 // are met:
 //
 // - Redistributions of source code must retain the above copyright notice,
 // this list of conditions and the following disclaimer.
 //
@@ skipping 252 matching lines @@
 // ldr rd, [pc, #offset]
 const Instr kLdrPCMask = CondMask | 15 * B24 | 7 * B20 | 15 * B16;
 const Instr kLdrPCPattern = al | 5 * B24 | L | pc.code() * B16;
 // blxcc rm
 const Instr kBlxRegMask =
     15 * B24 | 15 * B20 | 15 * B16 | 15 * B12 | 15 * B8 | 15 * B4;
 const Instr kBlxRegPattern =
     B24 | B21 | 15 * B16 | 15 * B12 | 15 * B8 | 3 * B4;
 // A mask for the Rd register for push, pop, ldr, str instructions.
 const Instr kRdMask = 0x0000f000;
+static const int kRdShift = 12;
 static const Instr kLdrRegFpOffsetPattern =
     al | B26 | L | Offset | fp.code() * B16;
 static const Instr kStrRegFpOffsetPattern =
     al | B26 | Offset | fp.code() * B16;
 static const Instr kLdrRegFpNegOffsetPattern =
     al | B26 | L | NegOffset | fp.code() * B16;
 static const Instr kStrRegFpNegOffsetPattern =
     al | B26 | NegOffset | fp.code() * B16;
 static const Instr kLdrStrInstrTypeMask = 0xffff0000;
 static const Instr kLdrStrInstrArgumentMask = 0x0000ffff;
 static const Instr kLdrStrOffsetMask = 0x00000fff;
-static const int kRdShift = 12;
 
 // Spare buffer.
 static const int kMinimalBufferSize = 4*KB;
 static byte* spare_buffer_ = NULL;
 
 Assembler::Assembler(void* buffer, int buffer_size) {
   if (buffer == NULL) {
     // Do our own buffer management.
     if (buffer_size <= kMinimalBufferSize) {
       buffer_size = kMinimalBufferSize;
@@ skipping 636 matching lines @@
 
 
 void Assembler::add(Register dst, Register src1, const Operand& src2,
                     SBit s, Condition cond) {
   addrmod1(cond | 4*B21 | s, src1, dst, src2);
 
   // Eliminate pattern: push(r), pop()
   //   str(src, MemOperand(sp, 4, NegPreIndex), al);
   //   add(sp, sp, Operand(kPointerSize));
   // Both instructions can be eliminated.
-  int pattern_size = 2 * kInstrSize;
-  if (FLAG_push_pop_elimination &&
-      last_bound_pos_ <= (pc_offset() - pattern_size) &&
-      reloc_info_writer.last_pc() <= (pc_ - pattern_size) &&
+  if (can_peephole_optimize(2) &&
       // Pattern.
       instr_at(pc_ - 1 * kInstrSize) == kPopInstruction &&
       (instr_at(pc_ - 2 * kInstrSize) & ~RdMask) == kPushRegPattern) {
     pc_ -= 2 * kInstrSize;
-    if (FLAG_print_push_pop_elimination) {
+    if (FLAG_print_peephole_optimization) {
       PrintF("%x push(reg)/pop() eliminated\n", pc_offset());
     }
   }
 }
 
 
 void Assembler::adc(Register dst, Register src1, const Operand& src2,
                     SBit s, Condition cond) {
   addrmod1(cond | 5*B21 | s, src1, dst, src2);
 }
@@ skipping 176 matching lines @@
     WriteRecordedPositions();
   }
   addrmod2(cond | B26 | L, dst, src);
 
   // Eliminate pattern: push(ry), pop(rx)
   //   str(ry, MemOperand(sp, 4, NegPreIndex), al)
   //   ldr(rx, MemOperand(sp, 4, PostIndex), al)
   // Both instructions can be eliminated if ry = rx.
   // If ry != rx, a register copy from ry to rx is inserted
   // after eliminating the push and the pop instructions.
-  int pattern_size = 2 * kInstrSize;
   Instr push_instr = instr_at(pc_ - 2 * kInstrSize);
   Instr pop_instr = instr_at(pc_ - 1 * kInstrSize);
 
-  if (FLAG_push_pop_elimination &&
-     last_bound_pos_ <= (pc_offset() - pattern_size) &&
-     reloc_info_writer.last_pc() <= (pc_ - pattern_size) &&
-     IsPush(push_instr) &&
-     IsPop(pop_instr)) {
+  if (can_peephole_optimize(2) &&
+      IsPush(push_instr) &&
+      IsPop(pop_instr)) {
     if ((pop_instr & kRdMask) != (push_instr & kRdMask)) {
       // For consecutive push and pop on different registers,
       // we delete both the push & pop and insert a register move.
       // push ry, pop rx --> mov rx, ry
       Register reg_pushed, reg_popped;
       reg_pushed = GetRd(push_instr);
       reg_popped = GetRd(pop_instr);
       pc_ -= 2 * kInstrSize;
       // Insert a mov instruction, which is better than a pair of push & pop
       mov(reg_popped, reg_pushed);
-      if (FLAG_print_push_pop_elimination) {
+      if (FLAG_print_peephole_optimization) {
         PrintF("%x push/pop (diff reg) replaced by a reg move\n", pc_offset());
       }
     } else {
       // For consecutive push and pop on the same register,
       // both the push and the pop can be deleted.
       pc_ -= 2 * kInstrSize;
-      if (FLAG_print_push_pop_elimination) {
+      if (FLAG_print_peephole_optimization) {
         PrintF("%x push/pop (same reg) eliminated\n", pc_offset());
       }
     }
   }
 
-  pattern_size = 2 * kInstrSize;
-  if (FLAG_peephole_optimization &&
-      last_bound_pos_ <= (pc_offset() - pattern_size) &&
-      reloc_info_writer.last_pc() <= (pc_ - pattern_size)) {
+  if (can_peephole_optimize(2)) {
     Instr str_instr = instr_at(pc_ - 2 * kInstrSize);
     Instr ldr_instr = instr_at(pc_ - 1 * kInstrSize);
 
     if ((IsStrRegFpOffset(str_instr) &&
          IsLdrRegFpOffset(ldr_instr)) ||
        (IsStrRegFpNegOffset(str_instr) &&
          IsLdrRegFpNegOffset(ldr_instr))) {
       if ((ldr_instr & kLdrStrInstrArgumentMask) ==
             (str_instr & kLdrStrInstrArgumentMask)) {
         // Pattern: Ldr/str same fp+offset, same register.
@@ skipping 27 matching lines @@
         pc_ -= 1 * kInstrSize;
         // Insert a mov instruction, which is better than ldr.
         mov(reg_loaded, reg_stored);
         if (FLAG_print_peephole_optimization) {
           PrintF("%x str/ldr (fp + same offset), diff reg \n", pc_offset());
         }
       }
     }
   }
 
-  pattern_size = 3 * kInstrSize;
-  if (FLAG_push_pop_elimination &&
-    last_bound_pos_ <= (pc_offset() - pattern_size) &&
-    reloc_info_writer.last_pc() <= (pc_ - pattern_size)) {
+  if (can_peephole_optimize(3)) {
     Instr mem_write_instr = instr_at(pc_ - 3 * kInstrSize);
     Instr ldr_instr = instr_at(pc_ - 2 * kInstrSize);
     Instr mem_read_instr = instr_at(pc_ - 1 * kInstrSize);
     if (IsPush(mem_write_instr) &&
         IsPop(mem_read_instr)) {
       if ((IsLdrRegFpOffset(ldr_instr) ||
         IsLdrRegFpNegOffset(ldr_instr))) {
         if ((mem_write_instr & kRdMask) ==
               (mem_read_instr & kRdMask)) {
           // Pattern: push & pop from/to same register,
@@ skipping 10 matching lines @@
           // else
           //   ldr rz, [fp, #-24]
 
           if ((mem_write_instr & kRdMask) == (ldr_instr & kRdMask)) {
             pc_ -= 3 * kInstrSize;
           } else {
             pc_ -= 3 * kInstrSize;
             // Reinsert back the ldr rz.
             emit(ldr_instr);
           }
-          if (FLAG_print_push_pop_elimination) {
+          if (FLAG_print_peephole_optimization) {
             PrintF("%x push/pop -dead ldr fp+offset in middle\n", pc_offset());
           }
         } else {
           // Pattern: push & pop from/to different registers
           // with a fp+offset ldr in between
           //
           // The following:
           // str rx, [sp, #-4]!
           // ldr rz, [fp, #-24]
           // ldr ry, [sp], #+4
@@ skipping 24 matching lines @@
           } else if (((mem_read_instr & kRdMask)
                                      != (ldr_instr & kRdMask)) ||
                     ((mem_write_instr & kRdMask)
                                      == (ldr_instr & kRdMask)) ) {
             reg_pushed = GetRd(mem_write_instr);
             reg_popped = GetRd(mem_read_instr);
             pc_ -= 3 * kInstrSize;
             mov(reg_popped, reg_pushed);
             emit(ldr_instr);
           }
-          if (FLAG_print_push_pop_elimination) {
+          if (FLAG_print_peephole_optimization) {
             PrintF("%x push/pop (ldr fp+off in middle)\n", pc_offset());
           }
         }
       }
     }
   }
 }
 
 
 void Assembler::str(Register src, const MemOperand& dst, Condition cond) {
   addrmod2(cond | B26, src, dst);
 
   // Eliminate pattern: pop(), push(r)
   //     add sp, sp, #4 LeaveCC, al; str r, [sp, #-4], al
   // ->  str r, [sp, 0], al
-  int pattern_size = 2 * kInstrSize;
-  if (FLAG_push_pop_elimination &&
-     last_bound_pos_ <= (pc_offset() - pattern_size) &&
-     reloc_info_writer.last_pc() <= (pc_ - pattern_size) &&
+  if (can_peephole_optimize(2) &&
      // Pattern.
      instr_at(pc_ - 1 * kInstrSize) == (kPushRegPattern | src.code() * B12) &&
      instr_at(pc_ - 2 * kInstrSize) == kPopInstruction) {
     pc_ -= 2 * kInstrSize;
     emit(al | B26 | 0 | Offset | sp.code() * B16 | src.code() * B12);
-    if (FLAG_print_push_pop_elimination) {
+    if (FLAG_print_peephole_optimization) {
       PrintF("%x pop()/push(reg) eliminated\n", pc_offset());
     }
   }
 }
 
 
 void Assembler::ldrb(Register dst, const MemOperand& src, Condition cond) {
   addrmod2(cond | B26 | B | L, dst, src);
 }
 
@@ skipping 921 matching lines @@
     bind(&after_pool);
   }
 
   // Since a constant pool was just emitted, move the check offset forward by
   // the standard interval.
   next_buffer_check_ = pc_offset() + kCheckConstInterval;
 }
 
 
 } }  // namespace v8::internal