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1 // Copyright 2010 the V8 project authors. All rights reserved. | 1 // Copyright 2010 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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28 // CPU specific code for arm independent of OS goes here. | 28 // CPU specific code for arm independent of OS goes here. |
29 | 29 |
30 #include <sys/syscall.h> | 30 #include <sys/syscall.h> |
31 #include <unistd.h> | 31 #include <unistd.h> |
32 | 32 |
33 #ifdef __mips | 33 #ifdef __mips |
34 #include <asm/cachectl.h> | 34 #include <asm/cachectl.h> |
35 #endif // #ifdef __mips | 35 #endif // #ifdef __mips |
36 | 36 |
37 #include "v8.h" | 37 #include "v8.h" |
| 38 |
| 39 #if defined(V8_TARGET_ARCH_MIPS) |
| 40 |
38 #include "cpu.h" | 41 #include "cpu.h" |
39 | 42 |
40 namespace v8 { | 43 namespace v8 { |
41 namespace internal { | 44 namespace internal { |
42 | 45 |
43 void CPU::Setup() { | 46 void CPU::Setup() { |
44 // Nothing to do. | 47 // Nothing to do. |
45 } | 48 } |
46 | 49 |
47 void CPU::FlushICache(void* start, size_t size) { | 50 void CPU::FlushICache(void* start, size_t size) { |
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60 | 63 |
61 | 64 |
62 void CPU::DebugBreak() { | 65 void CPU::DebugBreak() { |
63 #ifdef __mips | 66 #ifdef __mips |
64 asm volatile("break"); | 67 asm volatile("break"); |
65 #endif // #ifdef __mips | 68 #endif // #ifdef __mips |
66 } | 69 } |
67 | 70 |
68 } } // namespace v8::internal | 71 } } // namespace v8::internal |
69 | 72 |
| 73 #endif // V8_TARGET_ARCH_MIPS |
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