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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
6 // are met: | 6 // are met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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162 } | 162 } |
163 | 163 |
164 | 164 |
165 Operand::Operand(int32_t immediate, RelocInfo::Mode rmode) { | 165 Operand::Operand(int32_t immediate, RelocInfo::Mode rmode) { |
166 rm_ = no_reg; | 166 rm_ = no_reg; |
167 imm32_ = immediate; | 167 imm32_ = immediate; |
168 rmode_ = rmode; | 168 rmode_ = rmode; |
169 } | 169 } |
170 | 170 |
171 | 171 |
172 Operand::Operand(const char* s) { | |
173 rm_ = no_reg; | |
174 imm32_ = reinterpret_cast<int32_t>(s); | |
175 rmode_ = RelocInfo::EMBEDDED_STRING; | |
176 } | |
177 | |
178 | |
179 Operand::Operand(const ExternalReference& f) { | 172 Operand::Operand(const ExternalReference& f) { |
180 rm_ = no_reg; | 173 rm_ = no_reg; |
181 imm32_ = reinterpret_cast<int32_t>(f.address()); | 174 imm32_ = reinterpret_cast<int32_t>(f.address()); |
182 rmode_ = RelocInfo::EXTERNAL_REFERENCE; | 175 rmode_ = RelocInfo::EXTERNAL_REFERENCE; |
183 } | 176 } |
184 | 177 |
185 | 178 |
186 Operand::Operand(Smi* value) { | 179 Operand::Operand(Smi* value) { |
187 rm_ = no_reg; | 180 rm_ = no_reg; |
188 imm32_ = reinterpret_cast<intptr_t>(value); | 181 imm32_ = reinterpret_cast<intptr_t>(value); |
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273 // CPU::FlushICache(pc, sizeof(target)); | 266 // CPU::FlushICache(pc, sizeof(target)); |
274 // However, on ARM, no instruction was actually patched by the assignment | 267 // However, on ARM, no instruction was actually patched by the assignment |
275 // above; the target address is not part of an instruction, it is patched in | 268 // above; the target address is not part of an instruction, it is patched in |
276 // the constant pool and is read via a data access; the instruction accessing | 269 // the constant pool and is read via a data access; the instruction accessing |
277 // this address in the constant pool remains unchanged. | 270 // this address in the constant pool remains unchanged. |
278 } | 271 } |
279 | 272 |
280 } } // namespace v8::internal | 273 } } // namespace v8::internal |
281 | 274 |
282 #endif // V8_ARM_ASSEMBLER_ARM_INL_H_ | 275 #endif // V8_ARM_ASSEMBLER_ARM_INL_H_ |
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