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1 // Copyright 2009 the V8 project authors. All rights reserved. | 1 // Copyright 2009 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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740 } else { | 740 } else { |
741 movq(dst, src1); | 741 movq(dst, src1); |
742 subq(dst, src2); | 742 subq(dst, src2); |
743 j(overflow, on_not_smi_result); | 743 j(overflow, on_not_smi_result); |
744 } | 744 } |
745 } | 745 } |
746 | 746 |
747 | 747 |
748 void MacroAssembler::SmiSub(Register dst, | 748 void MacroAssembler::SmiSub(Register dst, |
749 Register src1, | 749 Register src1, |
750 Operand const& src2, | 750 const Operand& src2, |
751 Label* on_not_smi_result) { | 751 Label* on_not_smi_result) { |
752 if (on_not_smi_result == NULL) { | 752 if (on_not_smi_result == NULL) { |
753 // No overflow checking. Use only when it's known that | 753 // No overflow checking. Use only when it's known that |
754 // overflowing is impossible (e.g., subtracting two positive smis). | 754 // overflowing is impossible (e.g., subtracting two positive smis). |
755 if (dst.is(src1)) { | 755 if (dst.is(src1)) { |
756 subq(dst, src2); | 756 subq(dst, src2); |
757 } else { | 757 } else { |
758 movq(dst, src1); | 758 movq(dst, src1); |
759 subq(dst, src2); | 759 subq(dst, src2); |
760 } | 760 } |
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859 Move(kScratchRegister, constant); | 859 Move(kScratchRegister, constant); |
860 addq(dst, kScratchRegister); | 860 addq(dst, kScratchRegister); |
861 } else { | 861 } else { |
862 Move(dst, constant); | 862 Move(dst, constant); |
863 addq(dst, src); | 863 addq(dst, src); |
864 } | 864 } |
865 } | 865 } |
866 | 866 |
867 | 867 |
868 void MacroAssembler::SmiAddConstant(const Operand& dst, Smi* constant) { | 868 void MacroAssembler::SmiAddConstant(const Operand& dst, Smi* constant) { |
| 869 ASSERT(!dst.is(kScratchRegister)); |
869 if (constant->value() != 0) { | 870 if (constant->value() != 0) { |
870 Move(kScratchRegister, constant); | 871 Move(kScratchRegister, constant); |
871 addq(dst, kScratchRegister); | 872 addq(dst, kScratchRegister); |
872 } | 873 } |
873 } | 874 } |
874 | 875 |
875 | 876 |
876 void MacroAssembler::SmiAddConstant(Register dst, | 877 void MacroAssembler::SmiAddConstant(Register dst, |
877 Register src, | 878 Register src, |
878 Smi* constant, | 879 Smi* constant, |
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2714 CPU::FlushICache(address_, size_); | 2715 CPU::FlushICache(address_, size_); |
2715 | 2716 |
2716 // Check that the code was patched as expected. | 2717 // Check that the code was patched as expected. |
2717 ASSERT(masm_.pc_ == address_ + size_); | 2718 ASSERT(masm_.pc_ == address_ + size_); |
2718 ASSERT(masm_.reloc_info_writer.pos() == address_ + size_ + Assembler::kGap); | 2719 ASSERT(masm_.reloc_info_writer.pos() == address_ + size_ + Assembler::kGap); |
2719 } | 2720 } |
2720 | 2721 |
2721 } } // namespace v8::internal | 2722 } } // namespace v8::internal |
2722 | 2723 |
2723 #endif // V8_TARGET_ARCH_X64 | 2724 #endif // V8_TARGET_ARCH_X64 |
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