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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
6 // met: | 6 // met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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560 void cmovq(Condition cc, Register dst, Register src); | 560 void cmovq(Condition cc, Register dst, Register src); |
561 void cmovq(Condition cc, Register dst, const Operand& src); | 561 void cmovq(Condition cc, Register dst, const Operand& src); |
562 void cmovl(Condition cc, Register dst, Register src); | 562 void cmovl(Condition cc, Register dst, Register src); |
563 void cmovl(Condition cc, Register dst, const Operand& src); | 563 void cmovl(Condition cc, Register dst, const Operand& src); |
564 | 564 |
565 // Exchange two registers | 565 // Exchange two registers |
566 void xchg(Register dst, Register src); | 566 void xchg(Register dst, Register src); |
567 | 567 |
568 // Arithmetics | 568 // Arithmetics |
569 void addl(Register dst, Register src) { | 569 void addl(Register dst, Register src) { |
570 if (dst.low_bits() == 4) { // Forces SIB byte. | 570 arithmetic_op_32(0x03, dst, src); |
571 arithmetic_op_32(0x01, src, dst); | |
572 } else { | |
573 arithmetic_op_32(0x03, dst, src); | |
574 } | |
575 } | 571 } |
576 | 572 |
577 void addl(Register dst, Immediate src) { | 573 void addl(Register dst, Immediate src) { |
578 immediate_arithmetic_op_32(0x0, dst, src); | 574 immediate_arithmetic_op_32(0x0, dst, src); |
579 } | 575 } |
580 | 576 |
581 void addl(Register dst, const Operand& src) { | 577 void addl(Register dst, const Operand& src) { |
582 arithmetic_op_32(0x03, dst, src); | 578 arithmetic_op_32(0x03, dst, src); |
583 } | 579 } |
584 | 580 |
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600 | 596 |
601 void addq(Register dst, Immediate src) { | 597 void addq(Register dst, Immediate src) { |
602 immediate_arithmetic_op(0x0, dst, src); | 598 immediate_arithmetic_op(0x0, dst, src); |
603 } | 599 } |
604 | 600 |
605 void addq(const Operand& dst, Immediate src) { | 601 void addq(const Operand& dst, Immediate src) { |
606 immediate_arithmetic_op(0x0, dst, src); | 602 immediate_arithmetic_op(0x0, dst, src); |
607 } | 603 } |
608 | 604 |
609 void sbbl(Register dst, Register src) { | 605 void sbbl(Register dst, Register src) { |
610 if (dst.low_bits() == 4) { // Forces SIB byte if dst is base register. | 606 arithmetic_op_32(0x1b, dst, src); |
611 arithmetic_op_32(0x19, src, dst); | |
612 } else { | |
613 arithmetic_op_32(0x1b, dst, src); | |
614 } | |
615 } | 607 } |
616 | 608 |
617 void cmpb(Register dst, Immediate src) { | 609 void cmpb(Register dst, Immediate src) { |
618 immediate_arithmetic_op_8(0x7, dst, src); | 610 immediate_arithmetic_op_8(0x7, dst, src); |
619 } | 611 } |
620 | 612 |
621 void cmpb_al(Immediate src); | 613 void cmpb_al(Immediate src); |
622 | 614 |
623 void cmpb(Register dst, Register src) { | 615 void cmpb(Register dst, Register src) { |
624 arithmetic_op(0x3A, dst, src); | 616 arithmetic_op(0x3A, dst, src); |
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1402 private: | 1394 private: |
1403 Assembler* assembler_; | 1395 Assembler* assembler_; |
1404 #ifdef DEBUG | 1396 #ifdef DEBUG |
1405 int space_before_; | 1397 int space_before_; |
1406 #endif | 1398 #endif |
1407 }; | 1399 }; |
1408 | 1400 |
1409 } } // namespace v8::internal | 1401 } } // namespace v8::internal |
1410 | 1402 |
1411 #endif // V8_X64_ASSEMBLER_X64_H_ | 1403 #endif // V8_X64_ASSEMBLER_X64_H_ |
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