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1 // Copyright 2009 the V8 project authors. All rights reserved. | 1 // Copyright 2009 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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36 # define USE_ARM_EABI 1 | 36 # define USE_ARM_EABI 1 |
37 #endif | 37 #endif |
38 | 38 |
39 // This means that interwork-compatible jump instructions are generated. We | 39 // This means that interwork-compatible jump instructions are generated. We |
40 // want to generate them on the simulator too so it makes snapshots that can | 40 // want to generate them on the simulator too so it makes snapshots that can |
41 // be used on real hardware. | 41 // be used on real hardware. |
42 #if defined(__THUMB_INTERWORK__) || !defined(__arm__) | 42 #if defined(__THUMB_INTERWORK__) || !defined(__arm__) |
43 # define USE_THUMB_INTERWORK 1 | 43 # define USE_THUMB_INTERWORK 1 |
44 #endif | 44 #endif |
45 | 45 |
| 46 #if defined(__ARM_ARCH_5T__) || \ |
| 47 defined(__ARM_ARCH_5TE__) || \ |
| 48 defined(__ARM_ARCH_6__) || \ |
| 49 defined(__ARM_ARCH_7A__) || \ |
| 50 defined(__ARM_ARCH_7__) |
| 51 # define CAN_USE_ARMV5_INSTRUCTIONS 1 |
| 52 # define CAN_USE_THUMB_INSTRUCTIONS 1 |
| 53 #endif |
| 54 |
| 55 #if defined(__ARM_ARCH_6__) || \ |
| 56 defined(__ARM_ARCH_7A__) || \ |
| 57 defined(__ARM_ARCH_7__) |
| 58 # define CAN_USE_ARMV6_INSTRUCTIONS 1 |
| 59 #endif |
| 60 |
| 61 #if defined(__ARM_ARCH_7A__) || \ |
| 62 defined(__ARM_ARCH_7__) |
| 63 # define CAN_USE_ARMV7_INSTRUCTIONS 1 |
| 64 #endif |
| 65 |
46 // Simulator should support ARM5 instructions. | 66 // Simulator should support ARM5 instructions. |
47 #if !defined(__arm__) | 67 #if !defined(__arm__) |
48 # define __ARM_ARCH_5__ 1 | 68 # define CAN_USE_ARMV5_INSTRUCTIONS 1 |
49 # define __ARM_ARCH_5T__ 1 | 69 # define CAN_USE_THUMB_INSTRUCTIONS 1 |
50 #endif | 70 #endif |
51 | 71 |
52 namespace assembler { | 72 namespace assembler { |
53 namespace arm { | 73 namespace arm { |
54 | 74 |
55 // Number of registers in normal ARM mode. | 75 // Number of registers in normal ARM mode. |
56 static const int kNumRegisters = 16; | 76 static const int kNumRegisters = 16; |
57 | 77 |
58 // PC is register 15. | 78 // PC is register 15. |
59 static const int kPCRegister = 15; | 79 static const int kPCRegister = 15; |
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293 private: | 313 private: |
294 static const char* names_[kNumRegisters]; | 314 static const char* names_[kNumRegisters]; |
295 static const RegisterAlias aliases_[]; | 315 static const RegisterAlias aliases_[]; |
296 }; | 316 }; |
297 | 317 |
298 | 318 |
299 | 319 |
300 } } // namespace assembler::arm | 320 } } // namespace assembler::arm |
301 | 321 |
302 #endif // V8_ARM_CONSTANTS_ARM_H_ | 322 #endif // V8_ARM_CONSTANTS_ARM_H_ |
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