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| 1 /* linux/arch/arm/mach-s5pv210/include/mach/regs-sdaout.h |
| 2 * |
| 3 * Copyright (c) 2010 Samsung Electronics Co., Ltd. |
| 4 * http://www.samsung.com/ |
| 5 * |
| 6 * S5PV210 - TV Encoder register header file for Samsung TVOut driver |
| 7 * |
| 8 * This program is free software; you can redistribute it and/or modify |
| 9 * it under the terms of the GNU General Public License version 2 as |
| 10 * published by the Free Software Foundation. |
| 11 */ |
| 12 |
| 13 #ifndef __ASM_ARCH_REGS_SDAOUT_H |
| 14 #define __ASM_ARCH_REGS_SDAOUT_H __FILE__ |
| 15 |
| 16 #define S5P_SDAOUT_BASE(x) (x) |
| 17 |
| 18 #define S5P_SDO_CLKCON S5P_SDAOUT_BASE(0x0000) |
| 19 #define S5P_SDO_CONFIG S5P_SDAOUT_BASE(0x0008) |
| 20 #define S5P_SDO_SCALE S5P_SDAOUT_BASE(0x000C) |
| 21 #define S5P_SDO_SYNC S5P_SDAOUT_BASE(0x0010) |
| 22 #define S5P_SDO_VBI S5P_SDAOUT_BASE(0x0014) |
| 23 #define S5P_SDO_SCALE_CH0 S5P_SDAOUT_BASE(0x001C) |
| 24 #define S5P_SDO_SCALE_CH1 S5P_SDAOUT_BASE(0x0020) |
| 25 #define S5P_SDO_SCALE_CH2 S5P_SDAOUT_BASE(0x0024) |
| 26 #define S5P_SDO_YCDELAY S5P_SDAOUT_BASE(0x0034) |
| 27 #define S5P_SDO_SCHLOCK S5P_SDAOUT_BASE(0x0038) |
| 28 #define S5P_SDO_DAC S5P_SDAOUT_BASE(0x003C) |
| 29 #define S5P_SDO_FINFO S5P_SDAOUT_BASE(0x0040) |
| 30 #define S5P_SDO_Y0 S5P_SDAOUT_BASE(0x0044) |
| 31 #define S5P_SDO_Y1 S5P_SDAOUT_BASE(0x0048) |
| 32 #define S5P_SDO_Y2 S5P_SDAOUT_BASE(0x004C) |
| 33 #define S5P_SDO_Y3 S5P_SDAOUT_BASE(0x0050) |
| 34 #define S5P_SDO_Y4 S5P_SDAOUT_BASE(0x0054) |
| 35 #define S5P_SDO_Y5 S5P_SDAOUT_BASE(0x0058) |
| 36 #define S5P_SDO_Y6 S5P_SDAOUT_BASE(0x005C) |
| 37 #define S5P_SDO_Y7 S5P_SDAOUT_BASE(0x0060) |
| 38 #define S5P_SDO_Y8 S5P_SDAOUT_BASE(0x0064) |
| 39 #define S5P_SDO_Y9 S5P_SDAOUT_BASE(0x0068) |
| 40 #define S5P_SDO_Y10 S5P_SDAOUT_BASE(0x006C) |
| 41 #define S5P_SDO_Y11 S5P_SDAOUT_BASE(0x0070) |
| 42 #define S5P_SDO_CB0 S5P_SDAOUT_BASE(0x0080) |
| 43 #define S5P_SDO_CB1 S5P_SDAOUT_BASE(0x0084) |
| 44 #define S5P_SDO_CB2 S5P_SDAOUT_BASE(0x0088) |
| 45 #define S5P_SDO_CB3 S5P_SDAOUT_BASE(0x008C) |
| 46 #define S5P_SDO_CB4 S5P_SDAOUT_BASE(0x0090) |
| 47 #define S5P_SDO_CB5 S5P_SDAOUT_BASE(0x0094) |
| 48 #define S5P_SDO_CB6 S5P_SDAOUT_BASE(0x0098) |
| 49 #define S5P_SDO_CB7 S5P_SDAOUT_BASE(0x009C) |
| 50 #define S5P_SDO_CB8 S5P_SDAOUT_BASE(0x00A0) |
| 51 #define S5P_SDO_CB9 S5P_SDAOUT_BASE(0x00A4) |
| 52 #define S5P_SDO_CB10 S5P_SDAOUT_BASE(0x00A8) |
| 53 #define S5P_SDO_CB11 S5P_SDAOUT_BASE(0x00AC) |
| 54 #define S5P_SDO_CR0 S5P_SDAOUT_BASE(0x00C0) |
| 55 #define S5P_SDO_CR1 S5P_SDAOUT_BASE(0x00C4) |
| 56 #define S5P_SDO_CR2 S5P_SDAOUT_BASE(0x00C8) |
| 57 #define S5P_SDO_CR3 S5P_SDAOUT_BASE(0x00CC) |
| 58 #define S5P_SDO_CR4 S5P_SDAOUT_BASE(0x00D0) |
| 59 #define S5P_SDO_CR5 S5P_SDAOUT_BASE(0x00D4) |
| 60 #define S5P_SDO_CR6 S5P_SDAOUT_BASE(0x00D8) |
| 61 #define S5P_SDO_CR7 S5P_SDAOUT_BASE(0x00DC) |
| 62 #define S5P_SDO_CR8 S5P_SDAOUT_BASE(0x00E0) |
| 63 #define S5P_SDO_CR9 S5P_SDAOUT_BASE(0x00E4) |
| 64 #define S5P_SDO_CR10 S5P_SDAOUT_BASE(0x00E8) |
| 65 #define S5P_SDO_CR11 S5P_SDAOUT_BASE(0x00EC) |
| 66 #define S5P_SDO_MV_ON S5P_SDAOUT_BASE(0x0100) |
| 67 #define S5P_SDO_MV_SLINE_FIRST_EVEN S5P_SDAOUT_BASE(0x0104) |
| 68 #define S5P_SDO_MV_SLINE_FIRST_SPACE_EVEN S5P_SDAOUT_BASE(0x0108) |
| 69 #define S5P_SDO_MV_SLINE_FIRST_ODD S5P_SDAOUT_BASE(0x010C) |
| 70 #define S5P_SDO_MV_SLINE_FIRST_SPACE_ODD S5P_SDAOUT_BASE(0x0110) |
| 71 #define S5P_SDO_MV_SLINE_SPACING S5P_SDAOUT_BASE(0x0114) |
| 72 #define S5P_SDO_MV_STRIPES_NUMBER S5P_SDAOUT_BASE(0x0118) |
| 73 #define S5P_SDO_MV_STRIPES_THICKNESS S5P_SDAOUT_BASE(0x011C) |
| 74 #define S5P_SDO_MV_PSP_DURATION S5P_SDAOUT_BASE(0x0120) |
| 75 #define S5P_SDO_MV_PSP_FIRST S5P_SDAOUT_BASE(0x0124) |
| 76 #define S5P_SDO_MV_PSP_SPACING S5P_SDAOUT_BASE(0x0128) |
| 77 #define S5P_SDO_MV_SEL_LINE_PSP_AGC S5P_SDAOUT_BASE(0x012C) |
| 78 #define S5P_SDO_MV_SEL_FORMAT_PSP_AGC S5P_SDAOUT_BASE(0x0130) |
| 79 #define S5P_SDO_MV_PSP_AGC_A_ON S5P_SDAOUT_BASE(0x0134) |
| 80 #define S5P_SDO_MV_PSP_AGC_B_ON S5P_SDAOUT_BASE(0x0138) |
| 81 #define S5P_SDO_MV_BACK_PORCH S5P_SDAOUT_BASE(0x013C) |
| 82 #define S5P_SDO_MV_BURST_ADVANCED_ON S5P_SDAOUT_BASE(0x0140) |
| 83 #define S5P_SDO_MV_BURST_DURATION_ZONE1 S5P_SDAOUT_BASE(0x0144) |
| 84 #define S5P_SDO_MV_BURST_DURATION_ZONE2 S5P_SDAOUT_BASE(0x0148) |
| 85 #define S5P_SDO_MV_BURST_DURATION_ZONE3 S5P_SDAOUT_BASE(0x014C) |
| 86 #define S5P_SDO_MV_BURST_PHASE_ZONE S5P_SDAOUT_BASE(0x0150) |
| 87 #define S5P_SDO_MV_SLICE_PHASE_LINE S5P_SDAOUT_BASE(0x0154) |
| 88 #define S5P_SDO_MV_RGB_PROTECTION_ON S5P_SDAOUT_BASE(0x0158) |
| 89 #define S5P_SDO_MV_480P_PROTECTION_ON S5P_SDAOUT_BASE(0x015C) |
| 90 #define S5P_SDO_CCCON S5P_SDAOUT_BASE(0x0180) |
| 91 #define S5P_SDO_YSCALE S5P_SDAOUT_BASE(0x0184) |
| 92 #define S5P_SDO_CBSCALE S5P_SDAOUT_BASE(0x0188) |
| 93 #define S5P_SDO_CRSCALE S5P_SDAOUT_BASE(0x018C) |
| 94 #define S5P_SDO_CB_CR_OFFSET S5P_SDAOUT_BASE(0x0190) |
| 95 #define S5P_SDO_RGB_CC S5P_SDAOUT_BASE(0x0194) |
| 96 #define S5P_SDO_CVBS_CC_Y1 S5P_SDAOUT_BASE(0x0198) |
| 97 #define S5P_SDO_CVBS_CC_Y2 S5P_SDAOUT_BASE(0x019C) |
| 98 #define S5P_SDO_CVBS_CC_C S5P_SDAOUT_BASE(0x01A0) |
| 99 #define S5P_SDO_YC_CC_Y S5P_SDAOUT_BASE(0x01A4) |
| 100 #define S5P_SDO_YC_CC_C S5P_SDAOUT_BASE(0x01A8) |
| 101 #define S5P_SDO_CSC_525_PORCH S5P_SDAOUT_BASE(0x01B0) |
| 102 #define S5P_SDO_CSC_625_PORCH S5P_SDAOUT_BASE(0x01B4) |
| 103 #define S5P_SDO_RGBSYNC S5P_SDAOUT_BASE(0x01C0) |
| 104 #define S5P_SDO_OSFC00_0 S5P_SDAOUT_BASE(0x0200) |
| 105 #define S5P_SDO_OSFC01_0 S5P_SDAOUT_BASE(0x0204) |
| 106 #define S5P_SDO_OSFC02_0 S5P_SDAOUT_BASE(0x0208) |
| 107 #define S5P_SDO_OSFC03_0 S5P_SDAOUT_BASE(0x020C) |
| 108 #define S5P_SDO_OSFC04_0 S5P_SDAOUT_BASE(0x0210) |
| 109 #define S5P_SDO_OSFC05_0 S5P_SDAOUT_BASE(0x0214) |
| 110 #define S5P_SDO_OSFC06_0 S5P_SDAOUT_BASE(0x0218) |
| 111 #define S5P_SDO_OSFC07_0 S5P_SDAOUT_BASE(0x021C) |
| 112 #define S5P_SDO_OSFC08_0 S5P_SDAOUT_BASE(0x0220) |
| 113 #define S5P_SDO_OSFC09_0 S5P_SDAOUT_BASE(0x0224) |
| 114 #define S5P_SDO_OSFC10_0 S5P_SDAOUT_BASE(0x0228) |
| 115 #define S5P_SDO_OSFC11_0 S5P_SDAOUT_BASE(0x022C) |
| 116 #define S5P_SDO_OSFC12_0 S5P_SDAOUT_BASE(0x0230) |
| 117 #define S5P_SDO_OSFC13_0 S5P_SDAOUT_BASE(0x0234) |
| 118 #define S5P_SDO_OSFC14_0 S5P_SDAOUT_BASE(0x0238) |
| 119 #define S5P_SDO_OSFC15_0 S5P_SDAOUT_BASE(0x023C) |
| 120 #define S5P_SDO_OSFC16_0 S5P_SDAOUT_BASE(0x0240) |
| 121 #define S5P_SDO_OSFC17_0 S5P_SDAOUT_BASE(0x0244) |
| 122 #define S5P_SDO_OSFC18_0 S5P_SDAOUT_BASE(0x0248) |
| 123 #define S5P_SDO_OSFC19_0 S5P_SDAOUT_BASE(0x024C) |
| 124 #define S5P_SDO_OSFC20_0 S5P_SDAOUT_BASE(0x0250) |
| 125 #define S5P_SDO_OSFC21_0 S5P_SDAOUT_BASE(0x0254) |
| 126 #define S5P_SDO_OSFC22_0 S5P_SDAOUT_BASE(0x0258) |
| 127 #define S5P_SDO_OSFC23_0 S5P_SDAOUT_BASE(0x025C) |
| 128 #define S5P_SDO_XTALK0 S5P_SDAOUT_BASE(0x0260) |
| 129 #define S5P_SDO_XTALK1 S5P_SDAOUT_BASE(0x0264) |
| 130 #define S5P_SDO_XTALK2 S5P_SDAOUT_BASE(0x0268) |
| 131 #define S5P_SDO_BB_CTRL S5P_SDAOUT_BASE(0x026C) |
| 132 #define S5P_SDO_IRQ S5P_SDAOUT_BASE(0x0280) |
| 133 #define S5P_SDO_IRQMASK S5P_SDAOUT_BASE(0x0284) |
| 134 #define S5P_SDO_OSFC00_1 S5P_SDAOUT_BASE(0x02C0) |
| 135 #define S5P_SDO_OSFC01_1 S5P_SDAOUT_BASE(0x02C4) |
| 136 #define S5P_SDO_OSFC02_1 S5P_SDAOUT_BASE(0x02C8) |
| 137 #define S5P_SDO_OSFC03_1 S5P_SDAOUT_BASE(0x02CC) |
| 138 #define S5P_SDO_OSFC04_1 S5P_SDAOUT_BASE(0x02D0) |
| 139 #define S5P_SDO_OSFC05_1 S5P_SDAOUT_BASE(0x02D4) |
| 140 #define S5P_SDO_OSFC06_1 S5P_SDAOUT_BASE(0x02D8) |
| 141 #define S5P_SDO_OSFC07_1 S5P_SDAOUT_BASE(0x02DC) |
| 142 #define S5P_SDO_OSFC08_1 S5P_SDAOUT_BASE(0x02E0) |
| 143 #define S5P_SDO_OSFC09_1 S5P_SDAOUT_BASE(0x02E4) |
| 144 #define S5P_SDO_OSFC10_1 S5P_SDAOUT_BASE(0x02E8) |
| 145 #define S5P_SDO_OSFC11_1 S5P_SDAOUT_BASE(0x02EC) |
| 146 #define S5P_SDO_OSFC12_1 S5P_SDAOUT_BASE(0x02E0) |
| 147 #define S5P_SDO_OSFC13_1 S5P_SDAOUT_BASE(0x02F4) |
| 148 #define S5P_SDO_OSFC14_1 S5P_SDAOUT_BASE(0x02F8) |
| 149 #define S5P_SDO_OSFC15_1 S5P_SDAOUT_BASE(0x02FC) |
| 150 #define S5P_SDO_OSFC16_1 S5P_SDAOUT_BASE(0x0300) |
| 151 #define S5P_SDO_OSFC17_1 S5P_SDAOUT_BASE(0x0304) |
| 152 #define S5P_SDO_OSFC18_1 S5P_SDAOUT_BASE(0x0308) |
| 153 #define S5P_SDO_OSFC19_1 S5P_SDAOUT_BASE(0x030C) |
| 154 #define S5P_SDO_OSFC20_1 S5P_SDAOUT_BASE(0x0310) |
| 155 #define S5P_SDO_OSFC21_1 S5P_SDAOUT_BASE(0x0314) |
| 156 #define S5P_SDO_OSFC22_1 S5P_SDAOUT_BASE(0x0318) |
| 157 #define S5P_SDO_OSFC23_1 S5P_SDAOUT_BASE(0x031C) |
| 158 #define S5P_SDO_OSFC00_2 S5P_SDAOUT_BASE(0x0320) |
| 159 #define S5P_SDO_OSFC01_2 S5P_SDAOUT_BASE(0x0324) |
| 160 #define S5P_SDO_OSFC02_2 S5P_SDAOUT_BASE(0x0328) |
| 161 #define S5P_SDO_OSFC03_2 S5P_SDAOUT_BASE(0x032C) |
| 162 #define S5P_SDO_OSFC04_2 S5P_SDAOUT_BASE(0x0330) |
| 163 #define S5P_SDO_OSFC05_2 S5P_SDAOUT_BASE(0x0334) |
| 164 #define S5P_SDO_OSFC06_2 S5P_SDAOUT_BASE(0x0338) |
| 165 #define S5P_SDO_OSFC07_2 S5P_SDAOUT_BASE(0x033C) |
| 166 #define S5P_SDO_OSFC08_2 S5P_SDAOUT_BASE(0x0340) |
| 167 #define S5P_SDO_OSFC09_2 S5P_SDAOUT_BASE(0x0344) |
| 168 #define S5P_SDO_OSFC10_2 S5P_SDAOUT_BASE(0x0348) |
| 169 #define S5P_SDO_OSFC11_2 S5P_SDAOUT_BASE(0x034C) |
| 170 #define S5P_SDO_OSFC12_2 S5P_SDAOUT_BASE(0x0350) |
| 171 #define S5P_SDO_OSFC13_2 S5P_SDAOUT_BASE(0x0354) |
| 172 #define S5P_SDO_OSFC14_2 S5P_SDAOUT_BASE(0x0358) |
| 173 #define S5P_SDO_OSFC15_2 S5P_SDAOUT_BASE(0x035C) |
| 174 #define S5P_SDO_OSFC16_2 S5P_SDAOUT_BASE(0x0360) |
| 175 #define S5P_SDO_OSFC17_2 S5P_SDAOUT_BASE(0x0364) |
| 176 #define S5P_SDO_OSFC18_2 S5P_SDAOUT_BASE(0x0368) |
| 177 #define S5P_SDO_OSFC19_2 S5P_SDAOUT_BASE(0x036C) |
| 178 #define S5P_SDO_OSFC20_2 S5P_SDAOUT_BASE(0x0370) |
| 179 #define S5P_SDO_OSFC21_2 S5P_SDAOUT_BASE(0x0374) |
| 180 #define S5P_SDO_OSFC22_2 S5P_SDAOUT_BASE(0x0378) |
| 181 #define S5P_SDO_OSFC23_2 S5P_SDAOUT_BASE(0x037C) |
| 182 #define S5P_SDO_ARMCC S5P_SDAOUT_BASE(0x03C0) |
| 183 #define S5P_SDO_ARMWSS525 S5P_SDAOUT_BASE(0x03C4) |
| 184 #define S5P_SDO_ARMWSS625 S5P_SDAOUT_BASE(0x03C8) |
| 185 #define S5P_SDO_ARMCGMS525 S5P_SDAOUT_BASE(0x03CC) |
| 186 #define S5P_SDO_ARMCGMS625 S5P_SDAOUT_BASE(0x03D4) |
| 187 #define S5P_SDO_VERSION S5P_SDAOUT_BASE(0x03D8) |
| 188 #define S5P_SDO_CC S5P_SDAOUT_BASE(0x0380) |
| 189 #define S5P_SDO_WSS525 S5P_SDAOUT_BASE(0x0384) |
| 190 #define S5P_SDO_WSS625 S5P_SDAOUT_BASE(0x0388) |
| 191 #define S5P_SDO_CGMS525 S5P_SDAOUT_BASE(0x038C) |
| 192 #define S5P_SDO_CGMS625 S5P_SDAOUT_BASE(0x0394) |
| 193 |
| 194 /* SDO_CLKCON */ |
| 195 #define SDO_TVOUT_SW_RESET (1<<4) |
| 196 #define SDO_TVOUT_CLOCK_ON (1) |
| 197 #define SDO_TVOUT_CLOCK_OFF (0) |
| 198 |
| 199 /* SDO_CONFIG */ |
| 200 #define SDO_DAC2_Y_G (0<<20) |
| 201 #define SDO_DAC2_PB_B (1<<20) |
| 202 #define SDO_DAC2_PR_R (2<<20) |
| 203 #define SDO_DAC1_Y_G (0<<18) |
| 204 #define SDO_DAC1_PB_B (1<<18) |
| 205 #define SDO_DAC1_PR_R (2<<18) |
| 206 #define SDO_DAC0_Y_G (0<<16) |
| 207 #define SDO_DAC0_PB_B (1<<16) |
| 208 #define SDO_DAC0_PR_R (2<<16) |
| 209 #define SDO_DAC2_CVBS (0<<12) |
| 210 #define SDO_DAC2_Y (1<<12) |
| 211 #define SDO_DAC2_C (2<<12) |
| 212 #define SDO_DAC1_CVBS (0<<10) |
| 213 #define SDO_DAC1_Y (1<<10) |
| 214 #define SDO_DAC1_C (2<<10) |
| 215 #define SDO_DAC0_CVBS (0<<8) |
| 216 #define SDO_DAC0_Y (1<<8) |
| 217 #define SDO_DAC0_C (2<<8) |
| 218 #define SDO_COMPOSITE (0<<6) |
| 219 #define SDO_COMPONENT (1<<6) |
| 220 #define SDO_RGB (0<<5) |
| 221 #define SDO_YPBPR (1<<5) |
| 222 #define SDO_INTERLACED (0<<4) |
| 223 #define SDO_PROGRESSIVE (1<<4) |
| 224 #define SDO_NTSC_M (0) |
| 225 #define SDO_PAL_M (1) |
| 226 #define SDO_PAL_BGHID (2) |
| 227 #define SDO_PAL_N (3) |
| 228 #define SDO_PAL_NC (4) |
| 229 #define SDO_NTSC_443 (8) |
| 230 #define SDO_PAL_60 (9) |
| 231 |
| 232 /* SDO_SCALE */ |
| 233 #define SDO_COMPONENT_LEVEL_SEL_0IRE (0<<3) |
| 234 #define SDO_COMPONENT_LEVEL_SEL_75IRE (1<<3) |
| 235 #define SDO_COMPONENT_VTOS_RATIO_10_4 (0<<2) |
| 236 #define SDO_COMPONENT_VTOS_RATIO_7_3 (1<<2) |
| 237 #define SDO_COMPOSITE_LEVEL_SEL_0IRE (0<<1) |
| 238 #define SDO_COMPOSITE_LEVEL_SEL_75IRE (1<<1) |
| 239 #define SDO_COMPOSITE_VTOS_RATIO_10_4 (0<<0) |
| 240 #define SDO_COMPOSITE_VTOS_RATIO_7_3 (1<<0) |
| 241 |
| 242 /* SDO_SYNC */ |
| 243 #define SDO_COMPONENT_SYNC_ABSENT (0) |
| 244 #define SDO_COMPONENT_SYNC_YG (1) |
| 245 #define SDO_COMPONENT_SYNC_ALL (3) |
| 246 |
| 247 /* SDO_VBI */ |
| 248 #define SDO_CVBS_NO_WSS (0<<14) |
| 249 #define SDO_CVBS_WSS_INS (1<<14) |
| 250 #define SDO_CVBS_NO_CLOSED_CAPTION (0<<12) |
| 251 #define SDO_CVBS_21H_CLOSED_CAPTION (1<<12) |
| 252 #define SDO_CVBS_21H_284H_CLOSED_CAPTION (2<<12) |
| 253 #define SDO_CVBS_USE_OTHERS (3<<12) |
| 254 #define SDO_SVIDEO_NO_WSS (0<<10) |
| 255 #define SDO_SVIDEO_WSS_INS (1<<10) |
| 256 #define SDO_SVIDEO_NO_CLOSED_CAPTION (0<<8) |
| 257 #define SDO_SVIDEO_21H_CLOSED_CAPTION (1<<8) |
| 258 #define SDO_SVIDEO_21H_284H_CLOSED_CAPTION (2<<8) |
| 259 #define SDO_SVIDEO_USE_OTHERS (3<<8) |
| 260 #define SDO_RGB_NO_CGMSA (0<<7) |
| 261 #define SDO_RGB_CGMSA_INS (1<<7) |
| 262 #define SDO_RGB_NO_WSS (0<<6) |
| 263 #define SDO_RGB_WSS_INS (1<<6) |
| 264 #define SDO_RGB_NO_CLOSED_CAPTION (0<<4) |
| 265 #define SDO_RGB_21H_CLOSED_CAPTION (1<<4) |
| 266 #define SDO_RGB_21H_284H_CLOSED_CAPTION (2<<4) |
| 267 #define SDO_RGB_USE_OTHERS (3<<4) |
| 268 #define SDO_YPBPR_NO_CGMSA (0<<3) |
| 269 #define SDO_YPBPR_CGMSA_INS (1<<3) |
| 270 #define SDO_YPBPR_NO_WSS (0<<2) |
| 271 #define SDO_YPBPR_WSS_INS (1<<2) |
| 272 #define SDO_YPBPR_NO_CLOSED_CAPTION (0) |
| 273 #define SDO_YPBPR_21H_CLOSED_CAPTION (1) |
| 274 #define SDO_YPBPR_21H_284H_CLOSED_CAPTION (2) |
| 275 #define SDO_YPBPR_USE_OTHERS (3) |
| 276 |
| 277 /* SDO_SCALE_CHx */ |
| 278 #define SDO_SCALE_CONV_OFFSET(x) ((0x3ff&x)<<16) |
| 279 #define SDO_SCALE_CONV_GAIN(x) (0xfff&x) |
| 280 |
| 281 /* SDO_YCDELAY */ |
| 282 #define SDO_DELAY_YTOC(x) ((0xf&x)<<16) |
| 283 #define SDO_ACTIVE_START_OFFSET(x) ((0xff&x)<<8) |
| 284 #define SDO_ACTIVE_END_OFFSET(x) (0xff&x) |
| 285 |
| 286 /* SDO_SCHLOCK */ |
| 287 #define SDO_COLOR_SC_PHASE_ADJ (1) |
| 288 #define SDO_COLOR_SC_PHASE_NOADJ (0) |
| 289 |
| 290 /* SDO_DAC */ |
| 291 #define SDO_POWER_ON_DAC2 (1<<2) |
| 292 #define SDO_POWER_DOWN_DAC2 (0<<2) |
| 293 #define SDO_POWER_ON_DAC1 (1<<1) |
| 294 #define SDO_POWER_DOWN_DAC1 (0<<1) |
| 295 #define SDO_POWER_ON_DAC0 (1<<0) |
| 296 #define SDO_POWER_DOWN_DAC0 (0<<0) |
| 297 |
| 298 /* SDO_FINFO */ |
| 299 #define SDO_FIELD_MOD_1001(x) (((0x3ff<<16)&x)>>16) |
| 300 #define SDO_FIELD_ID_BOTTOM(x) ((1<<1)&x) |
| 301 #define SDO_FIELD_ID_BOTTOM_PI_INCATION(x) (1) |
| 302 |
| 303 #define SDO_AA_75_73 (0x2c0) |
| 304 #define SDO_AA_75_104 (0x2d1) |
| 305 #define SDO_AA_75_73 (0x2c0) |
| 306 #define SDO_AA_0_73 (0x30d) |
| 307 |
| 308 /* SDO_MV_480P_PROTECTION_ON */ |
| 309 #define SDO_MV_AGC_103_ON (1) |
| 310 |
| 311 /* SDO_CCCON */ |
| 312 #define SDO_COMPONENT_BHS_ADJ_ON (0<<4) |
| 313 #define SDO_COMPONENT_BHS_ADJ_OFF (1<<4) |
| 314 #define SDO_COMPONENT_YPBPR_COMP_ON (0<<3) |
| 315 #define SDO_COMPONENT_YPBPR_COMP_OFF (1<<3) |
| 316 #define SDO_COMPONENT_RGB_COMP_ON (0<<2) |
| 317 #define SDO_COMPONENT_RGB_COMP_OFF (1<<2) |
| 318 #define SDO_COMPONENT_YC_COMP_ON (0<<1) |
| 319 #define SDO_COMPONENT_YC_COMP_OFF (1<<1) |
| 320 #define SDO_COMPONENT_CVBS_COMP_ON (0) |
| 321 #define SDO_COMPONENT_CVBS_COMP_OFF (1) |
| 322 |
| 323 /* SDO_YSCALE */ |
| 324 #define SDO_BRIGHTNESS_GAIN(x) ((0xff&x)<<16) |
| 325 #define SDO_BRIGHTNESS_OFFSET(x) (0xff&x) |
| 326 |
| 327 /* SDO_CBSCALE */ |
| 328 #define SDO_HS_CB_GAIN0(x) ((0x1ff&x)<<16) |
| 329 #define SDO_HS_CB_GAIN1(x) (0x1ff&x) |
| 330 |
| 331 /* SDO_CRSCALE */ |
| 332 #define SDO_HS_CR_GAIN0(x) ((0x1ff&x)<<16) |
| 333 #define SDO_HS_CR_GAIN1(x) (0x1ff&x) |
| 334 |
| 335 /* SDO_CB_CR_OFFSET */ |
| 336 #define SDO_HS_CR_OFFSET(x) ((0x3ff&x)<<16) |
| 337 #define SDO_HS_CB_OFFSET(x) (0x3ff&x) |
| 338 |
| 339 /* SDO_RGB_CC */ |
| 340 #define SDO_MAX_RGB_CUBE(x) ((0xff&x)<<8) |
| 341 #define SDO_MIN_RGB_CUBE(x) (0xff&x) |
| 342 |
| 343 /* SDO_CVBS_CC_Y1 */ |
| 344 #define SDO_Y_LOWER_MID_CVBS_CORN(x) ((0x3ff&x)<<16) |
| 345 #define SDO_Y_BOTTOM_CVBS_CORN(x) (0x3ff&x) |
| 346 |
| 347 /* SDO_CVBS_CC_Y2 */ |
| 348 #define SDO_Y_TOP_CVBS_CORN(x) ((0x3ff&x)<<16) |
| 349 #define SDO_Y_UPPER_MID_CVBS_CORN(x) (0x3ff&x) |
| 350 |
| 351 /* SDO_CVBS_CC_C */ |
| 352 #define SDO_RADIUS_CVBS_CORN(x) (0x1ff&x) |
| 353 |
| 354 /* SDO_YC_CC_Y */ |
| 355 #define SDO_Y_TOP_YC_CYLINDER(x) ((0x3ff&x)<<16) |
| 356 #define SDO_Y_BOTOM_YC_CYLINDER(x) (0x3ff&x) |
| 357 |
| 358 /* SDO_CVBS_CC_C */ |
| 359 #define SDO_RADIUS_YC_CYLINDER(x) (0x1ff&x) |
| 360 |
| 361 /* SDO_CSC_525_PORCH */ |
| 362 #define SDO_COMPONENT_525_BP(x) ((0x3ff&x)<<16) |
| 363 #define SDO_COMPONENT_525_FP(x) (0x3ff&x) |
| 364 |
| 365 /* SDO_CSC_525_PORCH */ |
| 366 #define SDO_COMPONENT_625_BP(x) ((0x3ff&x)<<16) |
| 367 #define SDO_COMPONENT_625_FP(x) (0x3ff&x) |
| 368 |
| 369 /* SDO_RGBSYNC */ |
| 370 #define SDO_RGB_SYNC_COMPOSITE (0<<8) |
| 371 #define SDO_RGB_SYNC_SEPERATE (1<<8) |
| 372 #define SDO_RGB_VSYNC_LOW_ACT (0<<4) |
| 373 #define SDO_RGB_VSYNC_HIGH_ACT (1<<4) |
| 374 #define SDO_RGB_HSYNC_LOW_ACT 0 |
| 375 #define SDO_RGB_HSYNC_HIGH_ACT 1 |
| 376 |
| 377 /* SDO_OSFCxx_x */ |
| 378 #define SDO_OSF_COEF_ODD(x) ((0xfff&x)<<16) |
| 379 #define SDO_OSF_COEF_EVEN(x) (0xfff&x) |
| 380 |
| 381 /* SDO_XTALKx */ |
| 382 #define SDO_XTALK_COEF02(x) ((0xff&x)<<16) |
| 383 #define SDO_XTALK_COEF01(x) (0xff&x) |
| 384 |
| 385 /* SDO_BB_CTRL */ |
| 386 #define SDO_REF_BB_LEVEL_NTSC (0x11x<<8) |
| 387 #define SDO_REF_BB_LEVEL_PAL (0xfb<<8) |
| 388 #define SDO_SEL_BB_CJAN_CVBS0_BB1_BB2 (0<<4) |
| 389 #define SDO_SEL_BB_CJAN_BB0_CVBS1_BB2 (1<<4) |
| 390 #define SDO_SEL_BB_CJAN_BB0_BB1_CVBS2 (2<<4) |
| 391 #define SDO_BB_MODE_ENABLE (1) |
| 392 #define SDO_BB_MODE_DISABLE (0) |
| 393 |
| 394 /* SDO_IRQ */ |
| 395 #define SDO_VSYNC_IRQ_PEND (1) |
| 396 #define SDO_VSYNC_NO_IRQ (0) |
| 397 |
| 398 /* SDO_IRQMASK */ |
| 399 #define SDO_VSYNC_IRQ_ENABLE (0) |
| 400 #define SDO_VSYNC_IRQ_DISABLE (1) |
| 401 |
| 402 /* SDO_ARMCC */ |
| 403 #define SDO_DISPLAY_CC_CAPTION(x) ((0xff&x)<<16) |
| 404 #define SDO_NON_DISPLAY_CC_CAPTION(x) (0xff&x) |
| 405 |
| 406 #define SDO_CRC_WSS525(x) ((0x3f&x)<<14) |
| 407 #define SDO_WORD2_WSS525_COPY_PERMIT (0<<6) |
| 408 #define SDO_WORD2_WSS525_ONECOPY_PERMIT (1<<6) |
| 409 #define SDO_WORD2_WSS525_NOCOPY_PERMIT (3<<6) |
| 410 #define SDO_WORD2_WSS525_MV_PSP_OFF (0<<8) |
| 411 #define SDO_WORD2_WSS525_MV_PSP_ON_2LINE_BURST (1<<8) |
| 412 #define SDO_WORD2_WSS525_MV_PSP_ON_BURST_OFF (2<<8) |
| 413 #define SDO_WORD2_WSS525_MV_PSP_ON_4LINE_BURST (3<<8) |
| 414 #define SDO_WORD2_WSS525_ANALOG_OFF (0<<10) |
| 415 #define SDO_WORD2_WSS525_ANALOG_ON (1<<10) |
| 416 #define SDO_WORD1_WSS525_COPY_INFO (0<<2) |
| 417 #define SDO_WORD1_WSS525_DEFAULT (0xf<<2) |
| 418 #define SDO_WORD0_WSS525_4_3_NORMAL (0) |
| 419 #define SDO_WORD0_WSS525_16_9_ANAMORPIC (1) |
| 420 #define SDO_WORD0_WSS525_4_3_LETTERBOX (2) |
| 421 |
| 422 #define SDO_WSS625_SURROUND_SOUND_DISABLE (0<<11) |
| 423 #define SDO_WSS625_SURROUND_SOUND_ENABLE (1<<11) |
| 424 #define SDO_WSS625_NO_COPYRIGHT (0<<12) |
| 425 #define SDO_WSS625_COPYRIGHT (1<<12) |
| 426 #define SDO_WSS625_COPY_NOT_RESTRICTED (0<<13) |
| 427 #define SDO_WSS625_COPY_RESTRICTED (1<<13) |
| 428 #define SDO_WSS625_TELETEXT_NO_SUBTITLES (0<<8) |
| 429 #define SDO_WSS625_TELETEXT_SUBTITLES (1<<8) |
| 430 #define SDO_WSS625_NO_OPEN_SUBTITLES (0<<9) |
| 431 #define SDO_WSS625_INACT_OPEN_SUBTITLES (1<<9) |
| 432 #define SDO_WSS625_OUTACT_OPEN_SUBTITLES (2<<9) |
| 433 #define SDO_WSS625_CAMERA (0<<4) |
| 434 #define SDO_WSS625_FILM (1<<4) |
| 435 #define SDO_WSS625_NORMAL_PAL (0<<5) |
| 436 #define SDO_WSS625_MOTION_ADAPTIVE_COLORPLUS (1<<5) |
| 437 #define SDO_WSS625_HELPER_NO_SIG (0<<6) |
| 438 #define SDO_WSS625_HELPER_SIG (1<<6) |
| 439 #define SDO_WSS625_4_3_FULL_576 (0x8) |
| 440 #define SDO_WSS625_14_9_LETTERBOX_CENTER_504 (0x1) |
| 441 #define SDO_WSS625_14_9_LETTERBOX_TOP_504 (0x2) |
| 442 #define SDO_WSS625_16_9_LETTERBOX_CENTER_430 (0xb) |
| 443 #define SDO_WSS625_16_9_LETTERBOX_TOP_430 (0x4) |
| 444 #define SDO_WSS625_16_9_LETTERBOX_CENTER (0xd) |
| 445 #define SDO_WSS625_14_9_FULL_CENTER_576 (0xe) |
| 446 #define SDO_WSS625_16_9_ANAMORPIC_576 (0x7) |
| 447 |
| 448 #define SDO_CRC_CGMS525(x) ((0x3f&x)<<14) |
| 449 #define SDO_WORD2_CGMS525_COPY_PERMIT (0<<6) |
| 450 #define SDO_WORD2_CGMS525_ONECOPY_PERMIT (1<<6) |
| 451 #define SDO_WORD2_CGMS525_NOCOPY_PERMIT (3<<6) |
| 452 #define SDO_WORD2_CGMS525_MV_PSP_OFF (0<<8) |
| 453 #define SDO_WORD2_CGMS525_MV_PSP_ON_2LINE_BURST (1<<8) |
| 454 #define SDO_WORD2_CGMS525_MV_PSP_ON_BURST_OFF (2<<8) |
| 455 #define SDO_WORD2_CGMS525_MV_PSP_ON_4LINE_BURST (3<<8) |
| 456 #define SDO_WORD2_CGMS525_ANALOG_OFF (0<<10) |
| 457 #define SDO_WORD2_CGMS525_ANALOG_ON (1<<10) |
| 458 #define SDO_WORD1_CGMS525_COPY_INFO (0<<2) |
| 459 #define SDO_WORD1_CGMS525_DEFAULT (0xf<<2) |
| 460 #define SDO_WORD0_CGMS525_4_3_NORMAL (0) |
| 461 #define SDO_WORD0_CGMS525_16_9_ANAMORPIC (1) |
| 462 #define SDO_WORD0_CGMS525_4_3_LETTERBOX (2) |
| 463 |
| 464 #define SDO_CGMS625_SURROUND_SOUND_DISABLE (0<<11) |
| 465 #define SDO_CGMS625_SURROUND_SOUND_ENABLE (1<<11) |
| 466 #define SDO_CGMS625_NO_COPYRIGHT (0<<12) |
| 467 #define SDO_CGMS625_COPYRIGHT (1<<12) |
| 468 #define SDO_CGMS625_COPY_NOT_RESTRICTED (0<<13) |
| 469 #define SDO_CGMS625_COPY_RESTRICTED (1<<13) |
| 470 #define SDO_CGMS625_TELETEXT_NO_SUBTITLES (0<<8) |
| 471 #define SDO_CGMS625_TELETEXT_SUBTITLES (1<<8) |
| 472 #define SDO_CGMS625_NO_OPEN_SUBTITLES (0<<9) |
| 473 #define SDO_CGMS625_INACT_OPEN_SUBTITLES (1<<9) |
| 474 #define SDO_CGMS625_OUTACT_OPEN_SUBTITLES (2<<9) |
| 475 #define SDO_CGMS625_CAMERA (0<<4) |
| 476 #define SDO_CGMS625_FILM (1<<4) |
| 477 #define SDO_CGMS625_NORMAL_PAL (0<<5) |
| 478 #define SDO_CGMS625_MOTION_ADAPTIVE_COLORPLUS (1<<5) |
| 479 #define SDO_CGMS625_HELPER_NO_SIG (0<<6) |
| 480 #define SDO_CGMS625_HELPER_SIG (1<<6) |
| 481 #define SDO_CGMS625_4_3_FULL_576 (0x8) |
| 482 #define SDO_CGMS625_14_9_LETTERBOX_CENTER_504 (0x1) |
| 483 #define SDO_CGMS625_14_9_LETTERBOX_TOP_504 (0x2) |
| 484 #define SDO_CGMS625_16_9_LETTERBOX_CENTER_430 (0xb) |
| 485 #define SDO_CGMS625_16_9_LETTERBOX_TOP_430 (0x4) |
| 486 #define SDO_CGMS625_16_9_LETTERBOX_CENTER (0xd) |
| 487 #define SDO_CGMS625_14_9_FULL_CENTER_576 (0xe) |
| 488 #define SDO_CGMS625_16_9_ANAMORPIC_576 (0x7) |
| 489 |
| 490 #endif /*__ASM_ARCH_REGS_SDAOUT_H */ |
| OLD | NEW |
|---|
Chromium Code Reviews
Issue 2060003:
ARM: S5PV210: Add TV out driver register definition files (Closed)
Base URL: swsolcc@12.23.106.100:kernel-samsung.git