ldrd/strd

src/arm/simulator-arm.h

 // Copyright 2009 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 141 matching lines @@
 
   // The currently executing Simulator instance. Potentially there can be one
   // for each native thread.
   static Simulator* current();
 
   // Accessors for register state. Reading the pc value adheres to the ARM
   // architecture specification and is off by a 8 from the currently executing
   // instruction.
   void set_register(int reg, int32_t value);
   int32_t get_register(int reg) const;
+  void set_dw_register(int dreg, const int* dbl);
 
   // Support for VFP.
   void set_s_register(int reg, unsigned int value);
   unsigned int get_s_register(int reg) const;
   void set_d_register_from_double(int dreg, const double& dbl);
   double get_double_from_d_register(int dreg);
   void set_s_register_from_float(int sreg, const float dbl);
   float get_float_from_s_register(int sreg);
   void set_s_register_from_sinteger(int reg, const int value);
   int get_sinteger_from_s_register(int reg);
@@ skipping 73 matching lines @@
 
   inline uint16_t ReadHU(int32_t addr, Instr* instr);
   inline int16_t ReadH(int32_t addr, Instr* instr);
   // Note: Overloaded on the sign of the value.
   inline void WriteH(int32_t addr, uint16_t value, Instr* instr);
   inline void WriteH(int32_t addr, int16_t value, Instr* instr);
 
   inline int ReadW(int32_t addr, Instr* instr);
   inline void WriteW(int32_t addr, int value, Instr* instr);
 
+  int32_t* ReadDW(int32_t addr);
+  void WriteDW(int32_t addr, int32_t value1, int32_t value2);
+
   // Executing is handled based on the instruction type.
   void DecodeType01(Instr* instr);  // both type 0 and type 1 rolled into one
   void DecodeType2(Instr* instr);
   void DecodeType3(Instr* instr);
   void DecodeType4(Instr* instr);
   void DecodeType5(Instr* instr);
   void DecodeType6(Instr* instr);
   void DecodeType7(Instr* instr);
   void DecodeUnconditional(Instr* instr);
 
@@ skipping 80 matching lines @@
 
   static inline void UnregisterCTryCatch() {
     assembler::arm::Simulator::current()->PopAddress();
   }
 };
 
 
 #endif  // defined(__arm__)
 
 #endif  // V8_ARM_SIMULATOR_ARM_H_