ldrd/strd

src/arm/assembler-arm.h

 // Copyright (c) 1994-2006 Sun Microsystems Inc.
 // All Rights Reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions
 // are met:
 //
 // - Redistributions of source code must retain the above copyright notice,
 // this list of conditions and the following disclaimer.
 //
@@ skipping 429 matching lines @@
   // [rn +/- rm]          Offset/NegOffset
   // [rn +/- rm]!         PreIndex/NegPreIndex
   // [rn], +/- rm         PostIndex/NegPostIndex
   explicit MemOperand(Register rn, Register rm, AddrMode am = Offset);
 
   // [rn +/- rm <shift_op> shift_imm]      Offset/NegOffset
   // [rn +/- rm <shift_op> shift_imm]!     PreIndex/NegPreIndex
   // [rn], +/- rm <shift_op> shift_imm     PostIndex/NegPostIndex
   explicit MemOperand(Register rn, Register rm,
                       ShiftOp shift_op, int shift_imm, AddrMode am = Offset);
+  void set_offset(int32_t offset) {

[Erik Corry, 2010/05/07 20:04:34]

I added single spaces around these functions to match the style of the
surrounding code.

+      ASSERT(rm_.is(no_reg));
+      offset_ = offset;
+  }
+  uint32_t offset() {
+      ASSERT(rm_.is(no_reg));
+      return offset_;
+  }
+
+  Register rm() const {return rm_;}
 
  private:
   Register rn_;  // base
   Register rm_;  // register offset
   int32_t offset_;  // valid if rm_ == no_reg
   ShiftOp shift_op_;
   int shift_imm_;  // valid if rm_ != no_reg && rs_ == no_reg
   AddrMode am_;  // bits P, U, and W
 
   friend class Assembler;
@@ skipping 288 matching lines @@
 
   // Load/Store instructions
   void ldr(Register dst, const MemOperand& src, Condition cond = al);
   void str(Register src, const MemOperand& dst, Condition cond = al);
   void ldrb(Register dst, const MemOperand& src, Condition cond = al);
   void strb(Register src, const MemOperand& dst, Condition cond = al);
   void ldrh(Register dst, const MemOperand& src, Condition cond = al);
   void strh(Register src, const MemOperand& dst, Condition cond = al);
   void ldrsb(Register dst, const MemOperand& src, Condition cond = al);
   void ldrsh(Register dst, const MemOperand& src, Condition cond = al);
+  void ldrd(Register dst, const MemOperand& src, Condition cond = al);
+  void strd(Register src, const MemOperand& dst, Condition cond = al);
 
   // Load/Store multiple instructions
   void ldm(BlockAddrMode am, Register base, RegList dst, Condition cond = al);
   void stm(BlockAddrMode am, Register base, RegList src, Condition cond = al);
 
   // Semaphore instructions
   void swp(Register dst, Register src, Register base, Condition cond = al);
   void swpb(Register dst, Register src, Register base, Condition cond = al);
 
   // Exception-generating instructions and debugging support
@@ skipping 339 matching lines @@
 
   friend class RegExpMacroAssemblerARM;
   friend class RelocInfo;
   friend class CodePatcher;
   friend class BlockConstPoolScope;
 };
 
 } }  // namespace v8::internal
 
 #endif  // V8_ARM_ASSEMBLER_ARM_H_