X64: Convert smis to holding 32 bits of payload.

src/x64/assembler-x64.h

 // Copyright (c) 1994-2006 Sun Microsystems Inc.
 // All Rights Reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 // - Redistributions of source code must retain the above copyright notice,
 // this list of conditions and the following disclaimer.
 //
@@ skipping 204 matching lines @@
   above         =  7,
   negative      =  8,
   positive      =  9,
   parity_even   = 10,
   parity_odd    = 11,
   less          = 12,
   greater_equal = 13,
   less_equal    = 14,
   greater       = 15,
 
+  // Fake conditions that are handled by the
+  // opcodes using them.
+  always        = 16,
+  never         = 17,
   // aliases
   carry         = below,
   not_carry     = above_equal,
   zero          = equal,
   not_zero      = not_equal,
   sign          = negative,
-  not_sign      = positive
+  not_sign      = positive,
+  last_condition = greater
 };
 
 
 // Returns the equivalent of !cc.
 // Negation of the default no_condition (-1) results in a non-default
 // no_condition value (-2). As long as tests for no_condition check
 // for condition < 0, this will work as expected.
 inline Condition NegateCondition(Condition cc);
 
 // Corresponds to transposing the operands of a comparison.
@@ skipping 35 matching lines @@
       : ((hint == not_taken) ? taken : not_taken);
 }
 
 
 // -----------------------------------------------------------------------------
 // Machine instruction Immediates
 
 class Immediate BASE_EMBEDDED {
  public:
   explicit Immediate(int32_t value) : value_(value) {}
-  inline explicit Immediate(Smi* value);
 
  private:
   int32_t value_;
 
   friend class Assembler;
 };
 
 
 // -----------------------------------------------------------------------------
 // Machine instruction Operands
@@ skipping 394 matching lines @@
   }
 
   void and_(const Operand& dst, Immediate src) {
     immediate_arithmetic_op(0x4, dst, src);
   }
 
   void andl(Register dst, Immediate src) {
     immediate_arithmetic_op_32(0x4, dst, src);
   }
 
+  void andl(Register dst, Register src) {
+    arithmetic_op_32(0x23, dst, src);
+  }
+
+
   void decq(Register dst);
   void decq(const Operand& dst);
   void decl(Register dst);
   void decl(const Operand& dst);
   void decb(Register dst);
   void decb(const Operand& dst);
 
   // Sign-extends rax into rdx:rax.
   void cqo();
   // Sign-extends eax into edx:eax.
@@ skipping 41 matching lines @@
   }
 
   void or_(const Operand& dst, Register src) {
     arithmetic_op(0x09, src, dst);
   }
 
   void or_(Register dst, Immediate src) {
     immediate_arithmetic_op(0x1, dst, src);
   }
 
+  void orl(Register dst, Immediate src) {
+    immediate_arithmetic_op_32(0x1, dst, src);
+  }
+
   void or_(const Operand& dst, Immediate src) {
     immediate_arithmetic_op(0x1, dst, src);
   }
 
+  void orl(const Operand& dst, Immediate src) {
+    immediate_arithmetic_op_32(0x1, dst, src);
+  }
 
-  void rcl(Register dst, uint8_t imm8);
+
+  void rcl(Register dst, Immediate imm8) {
+    shift(dst, imm8, 0x2);
+  }
+
+  void rol(Register dst, Immediate imm8) {
+    shift(dst, imm8, 0x0);
+  }
+
+  void rcr(Register dst, Immediate imm8) {
+    shift(dst, imm8, 0x3);
+  }
+
+  void ror(Register dst, Immediate imm8) {
+    shift(dst, imm8, 0x1);
+  }
 
   // Shifts dst:src left by cl bits, affecting only dst.
   void shld(Register dst, Register src);
 
   // Shifts src:dst right by cl bits, affecting only dst.
   void shrd(Register dst, Register src);
 
   // Shifts dst right, duplicating sign bit, by shift_amount bits.
   // Shifting by 1 is handled efficiently.
   void sar(Register dst, Immediate shift_amount) {
@@ skipping 80 matching lines @@
   }
 
   void subl(Register dst, Immediate src) {
     immediate_arithmetic_op_32(0x5, dst, src);
   }
 
   void subb(Register dst, Immediate src) {
     immediate_arithmetic_op_8(0x5, dst, src);
   }
 
+  void testb(Register dst, Register src);
   void testb(Register reg, Immediate mask);
   void testb(const Operand& op, Immediate mask);
   void testl(Register dst, Register src);
   void testl(Register reg, Immediate mask);
   void testl(const Operand& op, Immediate mask);
   void testq(const Operand& op, Register reg);
   void testq(Register dst, Register src);
   void testq(Register dst, Immediate mask);
 
   void xor_(Register dst, Register src) {
@@ skipping 18 matching lines @@
 
   void xor_(const Operand& dst, Immediate src) {
     immediate_arithmetic_op(0x6, dst, src);
   }
 
   // Bit operations.
   void bt(const Operand& dst, Register src);
   void bts(const Operand& dst, Register src);
 
   // Miscellaneous
+  void clc();
   void cpuid();
   void hlt();
   void int3();
   void nop();
   void nop(int n);
   void rdtsc();
   void ret(int imm16);
   void setcc(Condition cc, Register reg);
 
   // Label operations & relative jumps (PPUM Appendix D)
@@ skipping 400 matching lines @@
  private:
   Assembler* assembler_;
 #ifdef DEBUG
   int space_before_;
 #endif
 };
 
 } }  // namespace v8::internal
 
 #endif  // V8_X64_ASSEMBLER_X64_H_