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1 // Copyright 2008 the V8 project authors. All rights reserved. | 1 // Copyright 2008 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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33 #include "constants-arm.h" | 33 #include "constants-arm.h" |
34 #include "simulator-arm.h" | 34 #include "simulator-arm.h" |
35 | 35 |
36 #if !defined(__arm__) | 36 #if !defined(__arm__) |
37 | 37 |
38 // Only build the simulator if not compiling for real ARM hardware. | 38 // Only build the simulator if not compiling for real ARM hardware. |
39 namespace assembler { namespace arm { | 39 namespace assembler { namespace arm { |
40 | 40 |
41 using ::v8::internal::Object; | 41 using ::v8::internal::Object; |
42 using ::v8::internal::PrintF; | 42 using ::v8::internal::PrintF; |
43 using ::v8:: internal::ReadLine; | 43 using ::v8::internal::OS; |
44 using ::v8:: internal::DeleteArray; | 44 using ::v8::internal::ReadLine; |
| 45 using ::v8::internal::DeleteArray; |
45 | 46 |
46 | 47 |
47 DEFINE_bool(trace_sim, false, "trace simulator execution"); | 48 DEFINE_bool(trace_sim, false, "trace simulator execution"); |
48 | 49 |
49 | 50 |
50 // The Debugger class is used by the simulator while debugging simulated ARM | 51 // The Debugger class is used by the simulator while debugging simulated ARM |
51 // code. | 52 // code. |
52 class Debugger { | 53 class Debugger { |
53 public: | 54 public: |
54 explicit Debugger(Simulator* sim); | 55 explicit Debugger(Simulator* sim); |
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1385 break; | 1386 break; |
1386 } | 1387 } |
1387 } | 1388 } |
1388 } | 1389 } |
1389 if (!pc_modified_) { | 1390 if (!pc_modified_) { |
1390 set_register(pc, reinterpret_cast<int32_t>(instr) + Instr::kInstrSize); | 1391 set_register(pc, reinterpret_cast<int32_t>(instr) + Instr::kInstrSize); |
1391 } | 1392 } |
1392 } | 1393 } |
1393 | 1394 |
1394 | 1395 |
1395 DEFINE_int(stop_sim_at, -1, "Simulator stop after x number of instructions"); | 1396 DEFINE_int(stop_sim_at, 0, "Simulator stop after x number of instructions"); |
1396 | 1397 |
1397 | 1398 |
1398 // | 1399 // |
1399 void Simulator::execute() { | 1400 void Simulator::execute() { |
1400 // Get the PC to simulate. Cannot use the accessor here as we need the | 1401 // Get the PC to simulate. Cannot use the accessor here as we need the |
1401 // raw PC value and not the one used as input to arithmetic instructions. | 1402 // raw PC value and not the one used as input to arithmetic instructions. |
1402 int program_counter = get_pc(); | 1403 int program_counter = get_pc(); |
1403 while (program_counter != end_sim_pc) { | 1404 |
1404 Instr* instr = reinterpret_cast<Instr*>(program_counter); | 1405 if (FLAG_stop_sim_at == 0) { |
1405 icount_++; | 1406 // Fast version of the dispatch loop without checking whether the simulator |
1406 if (icount_ == FLAG_stop_sim_at) { | 1407 // should be stopping at a particular executed instruction. |
1407 Debugger dbg(this); | 1408 while (program_counter != end_sim_pc) { |
1408 dbg.Debug(); | 1409 Instr* instr = reinterpret_cast<Instr*>(program_counter); |
1409 } else { | 1410 icount_++; |
1410 InstructionDecode(instr); | 1411 InstructionDecode(instr); |
| 1412 program_counter = get_pc(); |
1411 } | 1413 } |
1412 program_counter = get_pc(); | 1414 } else { |
| 1415 // FLAG_stop_sim_at is at the non-default value. Stop in the debugger when |
| 1416 // we reach the particular instuction count. |
| 1417 while (program_counter != end_sim_pc) { |
| 1418 Instr* instr = reinterpret_cast<Instr*>(program_counter); |
| 1419 icount_++; |
| 1420 if (icount_ == FLAG_stop_sim_at) { |
| 1421 Debugger dbg(this); |
| 1422 dbg.Debug(); |
| 1423 } else { |
| 1424 InstructionDecode(instr); |
| 1425 } |
| 1426 program_counter = get_pc(); |
| 1427 } |
1413 } | 1428 } |
1414 } | 1429 } |
1415 | 1430 |
1416 | 1431 |
1417 Object* Simulator::call(int32_t entry, int32_t p0, int32_t p1, int32_t p2, | 1432 Object* Simulator::call(int32_t entry, int32_t p0, int32_t p1, int32_t p2, |
1418 int32_t p3, int32_t p4) { | 1433 int32_t p3, int32_t p4) { |
1419 // Setup parameters | 1434 // Setup parameters |
1420 set_register(r0, p0); | 1435 set_register(r0, p0); |
1421 set_register(r1, p1); | 1436 set_register(r1, p1); |
1422 set_register(r2, p2); | 1437 set_register(r2, p2); |
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1479 set_register(r10, r10_val); | 1494 set_register(r10, r10_val); |
1480 set_register(r11, r11_val); | 1495 set_register(r11, r11_val); |
1481 | 1496 |
1482 int result = get_register(r0); | 1497 int result = get_register(r0); |
1483 return reinterpret_cast<Object*>(result); | 1498 return reinterpret_cast<Object*>(result); |
1484 } | 1499 } |
1485 | 1500 |
1486 } } // namespace assembler::arm | 1501 } } // namespace assembler::arm |
1487 | 1502 |
1488 #endif // !defined(__arm__) | 1503 #endif // !defined(__arm__) |
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