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Side by Side Diff: src/assembler-ia32-inl.h

Issue 18656: Avoid memmove when emitting operands in the assembler ... (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: '' Created 11 years, 11 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are 5 // modification, are permitted provided that the following conditions are
6 // met: 6 // met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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263 } 263 }
264 264
265 265
266 void Assembler::emit_disp(Label* L, Displacement::Type type) { 266 void Assembler::emit_disp(Label* L, Displacement::Type type) {
267 Displacement disp(L, type); 267 Displacement disp(L, type);
268 L->link_to(pc_offset()); 268 L->link_to(pc_offset());
269 emit(static_cast<int>(disp.data())); 269 emit(static_cast<int>(disp.data()));
270 } 270 }
271 271
272 272
273 void Operand::set_modrm(int mod, // reg == 0 273 void Operand::set_modrm(int mod, Register rm) {
274 Register rm) {
275 ASSERT((mod & -4) == 0); 274 ASSERT((mod & -4) == 0);
276 buf_[0] = mod << 6 | rm.code(); 275 buf_[0] = mod << 6 | rm.code();
277 len_ = 1; 276 len_ = 1;
278 } 277 }
279 278
280 279
281 void Operand::set_dispr(int32_t disp, RelocInfo::Mode rmode) { 280 void Operand::set_dispr(int32_t disp, RelocInfo::Mode rmode) {
282 ASSERT(len_ == 1 || len_ == 2); 281 ASSERT(len_ == 1 || len_ == 2);
283 *reinterpret_cast<int32_t*>(&buf_[len_]) = disp; 282 *reinterpret_cast<int32_t*>(&buf_[len_]) = disp;
284 len_ += sizeof(int32_t); 283 len_ += sizeof(int32_t);
285 rmode_ = rmode; 284 rmode_ = rmode;
286 } 285 }
287 286
288 Operand::Operand(Register reg) { 287 Operand::Operand(Register reg) {
289 // reg 288 // reg
290 set_modrm(3, reg); 289 set_modrm(3, reg);
291 } 290 }
292 291
293 292
294 Operand::Operand(int32_t disp, RelocInfo::Mode rmode) { 293 Operand::Operand(int32_t disp, RelocInfo::Mode rmode) {
295 // [disp/r] 294 // [disp/r]
296 set_modrm(0, ebp); 295 set_modrm(0, ebp);
297 set_dispr(disp, rmode); 296 set_dispr(disp, rmode);
298 } 297 }
299 298
300 } } // namespace v8::internal 299 } } // namespace v8::internal
301 300
302 #endif // V8_ASSEMBLER_IA32_INL_H_ 301 #endif // V8_ASSEMBLER_IA32_INL_H_
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