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Side by Side Diff: src/x64/assembler-x64.h

Issue 1860001: X64: Port inline transcendental cache to X64. (Closed)
Patch Set: Created 10 years, 7 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are 5 // modification, are permitted provided that the following conditions are
6 // met: 6 // met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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1012 1012
1013 // Conditional jumps 1013 // Conditional jumps
1014 void j(Condition cc, Label* L); 1014 void j(Condition cc, Label* L);
1015 void j(Condition cc, Handle<Code> target, RelocInfo::Mode rmode); 1015 void j(Condition cc, Handle<Code> target, RelocInfo::Mode rmode);
1016 1016
1017 // Floating-point operations 1017 // Floating-point operations
1018 void fld(int i); 1018 void fld(int i);
1019 1019
1020 void fld1(); 1020 void fld1();
1021 void fldz(); 1021 void fldz();
1022 void fldpi();
1022 1023
1023 void fld_s(const Operand& adr); 1024 void fld_s(const Operand& adr);
1024 void fld_d(const Operand& adr); 1025 void fld_d(const Operand& adr);
1025 1026
1026 void fstp_s(const Operand& adr); 1027 void fstp_s(const Operand& adr);
1027 void fstp_d(const Operand& adr); 1028 void fstp_d(const Operand& adr);
1028 void fstp(int index); 1029 void fstp(int index);
1029 1030
1030 void fild_s(const Operand& adr); 1031 void fild_s(const Operand& adr);
1031 void fild_d(const Operand& adr); 1032 void fild_d(const Operand& adr);
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1073 1074
1074 void fsin(); 1075 void fsin();
1075 void fcos(); 1076 void fcos();
1076 1077
1077 void frndint(); 1078 void frndint();
1078 1079
1079 void sahf(); 1080 void sahf();
1080 1081
1081 // SSE2 instructions 1082 // SSE2 instructions
1082 void movd(XMMRegister dst, Register src); 1083 void movd(XMMRegister dst, Register src);
1084 void movd(Register dst, XMMRegister src);
1085 void movq(XMMRegister dst, Register src);
1086 void movq(Register dst, XMMRegister src);
1087 void extractps(Register dst, XMMRegister src, byte imm8);
1083 1088
1084 void movsd(const Operand& dst, XMMRegister src); 1089 void movsd(const Operand& dst, XMMRegister src);
1085 void movsd(XMMRegister dst, XMMRegister src); 1090 void movsd(XMMRegister dst, XMMRegister src);
1086 void movsd(XMMRegister dst, const Operand& src); 1091 void movsd(XMMRegister dst, const Operand& src);
1087 1092
1088 void cvttss2si(Register dst, const Operand& src); 1093 void cvttss2si(Register dst, const Operand& src);
1089 void cvttsd2si(Register dst, const Operand& src); 1094 void cvttsd2si(Register dst, const Operand& src);
1090 1095
1091 void cvtlsi2sd(XMMRegister dst, const Operand& src); 1096 void cvtlsi2sd(XMMRegister dst, const Operand& src);
1092 void cvtlsi2sd(XMMRegister dst, Register src); 1097 void cvtlsi2sd(XMMRegister dst, Register src);
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1103 void xorpd(XMMRegister dst, XMMRegister src); 1108 void xorpd(XMMRegister dst, XMMRegister src);
1104 void sqrtsd(XMMRegister dst, XMMRegister src); 1109 void sqrtsd(XMMRegister dst, XMMRegister src);
1105 1110
1106 void comisd(XMMRegister dst, XMMRegister src); 1111 void comisd(XMMRegister dst, XMMRegister src);
1107 void ucomisd(XMMRegister dst, XMMRegister src); 1112 void ucomisd(XMMRegister dst, XMMRegister src);
1108 1113
1109 // The first argument is the reg field, the second argument is the r/m field. 1114 // The first argument is the reg field, the second argument is the r/m field.
1110 void emit_sse_operand(XMMRegister dst, XMMRegister src); 1115 void emit_sse_operand(XMMRegister dst, XMMRegister src);
1111 void emit_sse_operand(XMMRegister reg, const Operand& adr); 1116 void emit_sse_operand(XMMRegister reg, const Operand& adr);
1112 void emit_sse_operand(XMMRegister dst, Register src); 1117 void emit_sse_operand(XMMRegister dst, Register src);
1118 void emit_sse_operand(Register dst, XMMRegister src);
1113 1119
1114 // Use either movsd or movlpd. 1120 // Use either movsd or movlpd.
1115 // void movdbl(XMMRegister dst, const Operand& src); 1121 // void movdbl(XMMRegister dst, const Operand& src);
1116 // void movdbl(const Operand& dst, XMMRegister src); 1122 // void movdbl(const Operand& dst, XMMRegister src);
1117 1123
1118 // Debugging 1124 // Debugging
1119 void Print(); 1125 void Print();
1120 1126
1121 // Check the code size generated from label to here. 1127 // Check the code size generated from label to here.
1122 int SizeOfCodeGeneratedSince(Label* l) { return pc_offset() - l->pos(); } 1128 int SizeOfCodeGeneratedSince(Label* l) { return pc_offset() - l->pos(); }
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1169 inline void emitl(uint32_t x); 1175 inline void emitl(uint32_t x);
1170 inline void emitq(uint64_t x, RelocInfo::Mode rmode); 1176 inline void emitq(uint64_t x, RelocInfo::Mode rmode);
1171 inline void emitw(uint16_t x); 1177 inline void emitw(uint16_t x);
1172 inline void emit_code_target(Handle<Code> target, RelocInfo::Mode rmode); 1178 inline void emit_code_target(Handle<Code> target, RelocInfo::Mode rmode);
1173 void emit(Immediate x) { emitl(x.value_); } 1179 void emit(Immediate x) { emitl(x.value_); }
1174 1180
1175 // Emits a REX prefix that encodes a 64-bit operand size and 1181 // Emits a REX prefix that encodes a 64-bit operand size and
1176 // the top bit of both register codes. 1182 // the top bit of both register codes.
1177 // High bit of reg goes to REX.R, high bit of rm_reg goes to REX.B. 1183 // High bit of reg goes to REX.R, high bit of rm_reg goes to REX.B.
1178 // REX.W is set. 1184 // REX.W is set.
1185 inline void emit_rex_64(XMMRegister reg, Register rm_reg);
1186 inline void emit_rex_64(Register reg, XMMRegister rm_reg);
1179 inline void emit_rex_64(Register reg, Register rm_reg); 1187 inline void emit_rex_64(Register reg, Register rm_reg);
1180 inline void emit_rex_64(XMMRegister reg, Register rm_reg);
1181 1188
1182 // Emits a REX prefix that encodes a 64-bit operand size and 1189 // Emits a REX prefix that encodes a 64-bit operand size and
1183 // the top bit of the destination, index, and base register codes. 1190 // the top bit of the destination, index, and base register codes.
1184 // The high bit of reg is used for REX.R, the high bit of op's base 1191 // The high bit of reg is used for REX.R, the high bit of op's base
1185 // register is used for REX.B, and the high bit of op's index register 1192 // register is used for REX.B, and the high bit of op's index register
1186 // is used for REX.X. REX.W is set. 1193 // is used for REX.X. REX.W is set.
1187 inline void emit_rex_64(Register reg, const Operand& op); 1194 inline void emit_rex_64(Register reg, const Operand& op);
1188 inline void emit_rex_64(XMMRegister reg, const Operand& op); 1195 inline void emit_rex_64(XMMRegister reg, const Operand& op);
1189 1196
1190 // Emits a REX prefix that encodes a 64-bit operand size and 1197 // Emits a REX prefix that encodes a 64-bit operand size and
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1228 // register is used for REX.B, and the high bit of op's index register 1235 // register is used for REX.B, and the high bit of op's index register
1229 // is used for REX.X. REX.W is cleared. If no REX bits are set, nothing 1236 // is used for REX.X. REX.W is cleared. If no REX bits are set, nothing
1230 // is emitted. 1237 // is emitted.
1231 inline void emit_optional_rex_32(Register reg, const Operand& op); 1238 inline void emit_optional_rex_32(Register reg, const Operand& op);
1232 1239
1233 // As for emit_optional_rex_32(Register, Register), except that 1240 // As for emit_optional_rex_32(Register, Register), except that
1234 // the registers are XMM registers. 1241 // the registers are XMM registers.
1235 inline void emit_optional_rex_32(XMMRegister reg, XMMRegister base); 1242 inline void emit_optional_rex_32(XMMRegister reg, XMMRegister base);
1236 1243
1237 // As for emit_optional_rex_32(Register, Register), except that 1244 // As for emit_optional_rex_32(Register, Register), except that
1238 // the registers are XMM registers. 1245 // one of the registers is an XMM registers.
1239 inline void emit_optional_rex_32(XMMRegister reg, Register base); 1246 inline void emit_optional_rex_32(XMMRegister reg, Register base);
1240 1247
1248 // As for emit_optional_rex_32(Register, Register), except that
1249 // one of the registers is an XMM registers.
1250 inline void emit_optional_rex_32(Register reg, XMMRegister base);
1251
1241 // As for emit_optional_rex_32(Register, const Operand&), except that 1252 // As for emit_optional_rex_32(Register, const Operand&), except that
1242 // the register is an XMM register. 1253 // the register is an XMM register.
1243 inline void emit_optional_rex_32(XMMRegister reg, const Operand& op); 1254 inline void emit_optional_rex_32(XMMRegister reg, const Operand& op);
1244 1255
1245 // Optionally do as emit_rex_32(Register) if the register number has 1256 // Optionally do as emit_rex_32(Register) if the register number has
1246 // the high bit set. 1257 // the high bit set.
1247 inline void emit_optional_rex_32(Register rm_reg); 1258 inline void emit_optional_rex_32(Register rm_reg);
1248 1259
1249 // Optionally do as emit_rex_32(const Operand&) if the operand register 1260 // Optionally do as emit_rex_32(const Operand&) if the operand register
1250 // numbers have a high bit set. 1261 // numbers have a high bit set.
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1382 private: 1393 private:
1383 Assembler* assembler_; 1394 Assembler* assembler_;
1384 #ifdef DEBUG 1395 #ifdef DEBUG
1385 int space_before_; 1396 int space_before_;
1386 #endif 1397 #endif
1387 }; 1398 };
1388 1399
1389 } } // namespace v8::internal 1400 } } // namespace v8::internal
1390 1401
1391 #endif // V8_X64_ASSEMBLER_X64_H_ 1402 #endif // V8_X64_ASSEMBLER_X64_H_
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