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Side by Side Diff: src/x64/assembler-x64-inl.h

Issue 1860001: X64: Port inline transcendental cache to X64. (Closed)
Patch Set: Created 10 years, 7 months ago
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1 // Copyright 2009 the V8 project authors. All rights reserved. 1 // Copyright 2009 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
(...skipping 71 matching lines...) Expand 10 before | Expand all | Expand 10 after
82 void Assembler::emit_rex_64(Register reg, Register rm_reg) { 82 void Assembler::emit_rex_64(Register reg, Register rm_reg) {
83 emit(0x48 | reg.high_bit() << 2 | rm_reg.high_bit()); 83 emit(0x48 | reg.high_bit() << 2 | rm_reg.high_bit());
84 } 84 }
85 85
86 86
87 void Assembler::emit_rex_64(XMMRegister reg, Register rm_reg) { 87 void Assembler::emit_rex_64(XMMRegister reg, Register rm_reg) {
88 emit(0x48 | (reg.code() & 0x8) >> 1 | rm_reg.code() >> 3); 88 emit(0x48 | (reg.code() & 0x8) >> 1 | rm_reg.code() >> 3);
89 } 89 }
90 90
91 91
92 void Assembler::emit_rex_64(Register reg, XMMRegister rm_reg) {
93 emit(0x48 | (reg.code() & 0x8) >> 1 | rm_reg.code() >> 3);
94 }
95
96
92 void Assembler::emit_rex_64(Register reg, const Operand& op) { 97 void Assembler::emit_rex_64(Register reg, const Operand& op) {
93 emit(0x48 | reg.high_bit() << 2 | op.rex_); 98 emit(0x48 | reg.high_bit() << 2 | op.rex_);
94 } 99 }
95 100
96 101
97 void Assembler::emit_rex_64(XMMRegister reg, const Operand& op) { 102 void Assembler::emit_rex_64(XMMRegister reg, const Operand& op) {
98 emit(0x48 | (reg.code() & 0x8) >> 1 | op.rex_); 103 emit(0x48 | (reg.code() & 0x8) >> 1 | op.rex_);
99 } 104 }
100 105
101 106
(...skipping 51 matching lines...) Expand 10 before | Expand all | Expand 10 after
153 if (rex_bits != 0) emit(0x40 | rex_bits); 158 if (rex_bits != 0) emit(0x40 | rex_bits);
154 } 159 }
155 160
156 161
157 void Assembler::emit_optional_rex_32(XMMRegister reg, Register base) { 162 void Assembler::emit_optional_rex_32(XMMRegister reg, Register base) {
158 byte rex_bits = (reg.code() & 0x8) >> 1 | (base.code() & 0x8) >> 3; 163 byte rex_bits = (reg.code() & 0x8) >> 1 | (base.code() & 0x8) >> 3;
159 if (rex_bits != 0) emit(0x40 | rex_bits); 164 if (rex_bits != 0) emit(0x40 | rex_bits);
160 } 165 }
161 166
162 167
168 void Assembler::emit_optional_rex_32(Register reg, XMMRegister base) {
169 byte rex_bits = (reg.code() & 0x8) >> 1 | (base.code() & 0x8) >> 3;
170 if (rex_bits != 0) emit(0x40 | rex_bits);
171 }
172
173
163 void Assembler::emit_optional_rex_32(Register rm_reg) { 174 void Assembler::emit_optional_rex_32(Register rm_reg) {
164 if (rm_reg.high_bit()) emit(0x41); 175 if (rm_reg.high_bit()) emit(0x41);
165 } 176 }
166 177
167 178
168 void Assembler::emit_optional_rex_32(const Operand& op) { 179 void Assembler::emit_optional_rex_32(const Operand& op) {
169 if (op.rex_ != 0) emit(0x40 | op.rex_); 180 if (op.rex_ != 0) emit(0x40 | op.rex_);
170 } 181 }
171 182
172 183
(...skipping 170 matching lines...) Expand 10 before | Expand all | Expand 10 after
343 ASSERT(len_ == 1 || len_ == 2); 354 ASSERT(len_ == 1 || len_ == 2);
344 int32_t* p = reinterpret_cast<int32_t*>(&buf_[len_]); 355 int32_t* p = reinterpret_cast<int32_t*>(&buf_[len_]);
345 *p = disp; 356 *p = disp;
346 len_ += sizeof(int32_t); 357 len_ += sizeof(int32_t);
347 } 358 }
348 359
349 360
350 } } // namespace v8::internal 361 } } // namespace v8::internal
351 362
352 #endif // V8_X64_ASSEMBLER_X64_INL_H_ 363 #endif // V8_X64_ASSEMBLER_X64_INL_H_
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