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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
6 // are met: | 6 // are met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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889 const DwVfpRegister src2, | 889 const DwVfpRegister src2, |
890 const Condition cond = al); | 890 const Condition cond = al); |
891 void vcmp(const DwVfpRegister src1, | 891 void vcmp(const DwVfpRegister src1, |
892 const DwVfpRegister src2, | 892 const DwVfpRegister src2, |
893 const SBit s = LeaveCC, | 893 const SBit s = LeaveCC, |
894 const Condition cond = al); | 894 const Condition cond = al); |
895 void vmrs(const Register dst, | 895 void vmrs(const Register dst, |
896 const Condition cond = al); | 896 const Condition cond = al); |
897 | 897 |
898 // Pseudo instructions | 898 // Pseudo instructions |
899 void nop() { mov(r0, Operand(r0)); } | 899 void nop(int type = 0); |
900 | 900 |
901 void push(Register src, Condition cond = al) { | 901 void push(Register src, Condition cond = al) { |
902 str(src, MemOperand(sp, 4, NegPreIndex), cond); | 902 str(src, MemOperand(sp, 4, NegPreIndex), cond); |
903 } | 903 } |
904 | 904 |
905 void pop(Register dst, Condition cond = al) { | 905 void pop(Register dst, Condition cond = al) { |
906 ldr(dst, MemOperand(sp, 4, PostIndex), cond); | 906 ldr(dst, MemOperand(sp, 4, PostIndex), cond); |
907 } | 907 } |
908 | 908 |
909 void pop() { | 909 void pop() { |
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922 return (pc_offset() - l->pos()) / kInstrSize; | 922 return (pc_offset() - l->pos()) / kInstrSize; |
923 } | 923 } |
924 | 924 |
925 // Check whether an immediate fits an addressing mode 1 instruction. | 925 // Check whether an immediate fits an addressing mode 1 instruction. |
926 bool ImmediateFitsAddrMode1Instruction(int32_t imm32); | 926 bool ImmediateFitsAddrMode1Instruction(int32_t imm32); |
927 | 927 |
928 // Class for scoping postponing the constant pool generation. | 928 // Class for scoping postponing the constant pool generation. |
929 class BlockConstPoolScope { | 929 class BlockConstPoolScope { |
930 public: | 930 public: |
931 explicit BlockConstPoolScope(Assembler* assem) : assem_(assem) { | 931 explicit BlockConstPoolScope(Assembler* assem) : assem_(assem) { |
932 assem_->const_pool_blocked_nesting_++; | 932 assem_->StartBlockConstPool(); |
933 } | 933 } |
934 ~BlockConstPoolScope() { | 934 ~BlockConstPoolScope() { |
935 assem_->const_pool_blocked_nesting_--; | 935 assem_->EndBlockConstPool(); |
936 } | 936 } |
937 | 937 |
938 private: | 938 private: |
939 Assembler* assem_; | 939 Assembler* assem_; |
940 | 940 |
941 DISALLOW_IMPLICIT_CONSTRUCTORS(BlockConstPoolScope); | 941 DISALLOW_IMPLICIT_CONSTRUCTORS(BlockConstPoolScope); |
942 }; | 942 }; |
943 | 943 |
944 // Debugging | 944 // Debugging |
945 | 945 |
946 // Mark address of the ExitJSFrame code. | 946 // Mark address of the ExitJSFrame code. |
947 void RecordJSReturn(); | 947 void RecordJSReturn(); |
948 | 948 |
949 // Record a comment relocation entry that can be used by a disassembler. | 949 // Record a comment relocation entry that can be used by a disassembler. |
950 // Use --debug_code to enable. | 950 // Use --debug_code to enable. |
951 void RecordComment(const char* msg); | 951 void RecordComment(const char* msg); |
952 | 952 |
953 void RecordPosition(int pos); | 953 void RecordPosition(int pos); |
954 void RecordStatementPosition(int pos); | 954 void RecordStatementPosition(int pos); |
955 void WriteRecordedPositions(); | 955 void WriteRecordedPositions(); |
956 | 956 |
957 int pc_offset() const { return pc_ - buffer_; } | 957 int pc_offset() const { return pc_ - buffer_; } |
958 int current_position() const { return current_position_; } | 958 int current_position() const { return current_position_; } |
959 int current_statement_position() const { return current_statement_position_; } | 959 int current_statement_position() const { return current_statement_position_; } |
960 | 960 |
| 961 void StartBlockConstPool() { |
| 962 const_pool_blocked_nesting_++; |
| 963 } |
| 964 void EndBlockConstPool() { |
| 965 const_pool_blocked_nesting_--; |
| 966 } |
| 967 |
961 // Read/patch instructions | 968 // Read/patch instructions |
962 static Instr instr_at(byte* pc) { return *reinterpret_cast<Instr*>(pc); } | 969 static Instr instr_at(byte* pc) { return *reinterpret_cast<Instr*>(pc); } |
963 static void instr_at_put(byte* pc, Instr instr) { | 970 static void instr_at_put(byte* pc, Instr instr) { |
964 *reinterpret_cast<Instr*>(pc) = instr; | 971 *reinterpret_cast<Instr*>(pc) = instr; |
965 } | 972 } |
966 static bool IsB(Instr instr); | 973 static bool IsNop(Instr instr, int type = 0); |
967 static int GetBOffset(Instr instr); | 974 static bool IsBranch(Instr instr); |
| 975 static int GetBranchOffset(Instr instr); |
968 static bool IsLdrRegisterImmediate(Instr instr); | 976 static bool IsLdrRegisterImmediate(Instr instr); |
969 static int GetLdrRegisterImmediateOffset(Instr instr); | 977 static int GetLdrRegisterImmediateOffset(Instr instr); |
970 static Instr SetLdrRegisterImmediateOffset(Instr instr, int offset); | 978 static Instr SetLdrRegisterImmediateOffset(Instr instr, int offset); |
971 | 979 |
| 980 |
972 protected: | 981 protected: |
973 int buffer_space() const { return reloc_info_writer.pos() - pc_; } | 982 int buffer_space() const { return reloc_info_writer.pos() - pc_; } |
974 | 983 |
975 // Read/patch instructions | 984 // Read/patch instructions |
976 Instr instr_at(int pos) { return *reinterpret_cast<Instr*>(buffer_ + pos); } | 985 Instr instr_at(int pos) { return *reinterpret_cast<Instr*>(buffer_ + pos); } |
977 void instr_at_put(int pos, Instr instr) { | 986 void instr_at_put(int pos, Instr instr) { |
978 *reinterpret_cast<Instr*>(buffer_ + pos) = instr; | 987 *reinterpret_cast<Instr*>(buffer_ + pos) = instr; |
979 } | 988 } |
980 | 989 |
981 // Decode branch instruction at pos and return branch target pos | 990 // Decode branch instruction at pos and return branch target pos |
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1094 | 1103 |
1095 friend class RegExpMacroAssemblerARM; | 1104 friend class RegExpMacroAssemblerARM; |
1096 friend class RelocInfo; | 1105 friend class RelocInfo; |
1097 friend class CodePatcher; | 1106 friend class CodePatcher; |
1098 friend class BlockConstPoolScope; | 1107 friend class BlockConstPoolScope; |
1099 }; | 1108 }; |
1100 | 1109 |
1101 } } // namespace v8::internal | 1110 } } // namespace v8::internal |
1102 | 1111 |
1103 #endif // V8_ARM_ASSEMBLER_ARM_H_ | 1112 #endif // V8_ARM_ASSEMBLER_ARM_H_ |
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