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Issue 1731013: unaligned memory access support for ARMv7 Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: '' Created 10 years, 7 months ago
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1 // Copyright 2010 the V8 project authors. All rights reserved. 1 // Copyright 2010 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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859 } 859 }
860 860
861 861
862 void Simulator::TrashCallerSaveRegisters() { 862 void Simulator::TrashCallerSaveRegisters() {
863 // We don't trash the registers with the return value. 863 // We don't trash the registers with the return value.
864 registers_[2] = 0x50Bad4U; 864 registers_[2] = 0x50Bad4U;
865 registers_[3] = 0x50Bad4U; 865 registers_[3] = 0x50Bad4U;
866 registers_[12] = 0x50Bad4U; 866 registers_[12] = 0x50Bad4U;
867 } 867 }
868 868
869 869 // Some Operating Systems allow unaligned access on ARMv7 targets. We
870 // The ARM cannot do unaligned reads and writes. On some ARM platforms an 870 // assume that unaligned accesses are not allowed unless the v8 build system
871 // interrupt is caused. On others it does a funky rotation thing. For now we 871 // defines the CAN_USE_UNALIGNED_ACCESSES macro to be non-zero.
872 // The following statements below describes the behavior of the ARM CPUs
873 // that don't support unaligned access.
874 // Some ARM platforms raises an interrupt on detecting unaligned access.
875 // On others it does a funky rotation thing. For now we
872 // simply disallow unaligned reads, but at some point we may want to move to 876 // simply disallow unaligned reads, but at some point we may want to move to
873 // emulating the rotate behaviour. Note that simulator runs have the runtime 877 // emulating the rotate behaviour. Note that simulator runs have the runtime
874 // system running directly on the host system and only generated code is 878 // system running directly on the host system and only generated code is
875 // executed in the simulator. Since the host is typically IA32 we will not 879 // executed in the simulator. Since the host is typically IA32 we will not
876 // get the correct ARM-like behaviour on unaligned accesses. 880 // get the correct ARM-like behaviour on unaligned accesses for those ARM
881 // targets that don't support unaligned loads and stores.
882
877 883
878 int Simulator::ReadW(int32_t addr, Instr* instr) { 884 int Simulator::ReadW(int32_t addr, Instr* instr) {
885 #if V8_TARGET_CAN_READ_UNALIGNED
886 intptr_t* ptr = reinterpret_cast<intptr_t*>(addr);
887 return *ptr;
888 #else
879 if ((addr & 3) == 0) { 889 if ((addr & 3) == 0) {
880 intptr_t* ptr = reinterpret_cast<intptr_t*>(addr); 890 intptr_t* ptr = reinterpret_cast<intptr_t*>(addr);
881 return *ptr; 891 return *ptr;
882 } 892 }
883 PrintF("Unaligned read at 0x%08x\n", addr); 893 PrintF("Unaligned read at 0x%08x\n", addr);
884 UNIMPLEMENTED(); 894 UNIMPLEMENTED();
885 return 0; 895 return 0;
896 #endif
886 } 897 }
887 898
888 899
889 void Simulator::WriteW(int32_t addr, int value, Instr* instr) { 900 void Simulator::WriteW(int32_t addr, int value, Instr* instr) {
901 #if V8_TARGET_CAN_READ_UNALIGNED
902 intptr_t* ptr = reinterpret_cast<intptr_t*>(addr);
903 *ptr = value;
904 return;
905 #else
890 if ((addr & 3) == 0) { 906 if ((addr & 3) == 0) {
891 intptr_t* ptr = reinterpret_cast<intptr_t*>(addr); 907 intptr_t* ptr = reinterpret_cast<intptr_t*>(addr);
892 *ptr = value; 908 *ptr = value;
893 return; 909 return;
894 } 910 }
895 PrintF("Unaligned write at 0x%08x, pc=%p\n", addr, instr); 911 PrintF("Unaligned write at 0x%08x, pc=%p\n", addr, instr);
896 UNIMPLEMENTED(); 912 UNIMPLEMENTED();
913 #endif
897 } 914 }
898 915
899 916
900 uint16_t Simulator::ReadHU(int32_t addr, Instr* instr) { 917 uint16_t Simulator::ReadHU(int32_t addr, Instr* instr) {
918 #if V8_TARGET_CAN_READ_UNALIGNED
919 uint16_t* ptr = reinterpret_cast<uint16_t*>(addr);
920 return *ptr;
921 #else
901 if ((addr & 1) == 0) { 922 if ((addr & 1) == 0) {
902 uint16_t* ptr = reinterpret_cast<uint16_t*>(addr); 923 uint16_t* ptr = reinterpret_cast<uint16_t*>(addr);
903 return *ptr; 924 return *ptr;
904 } 925 }
905 PrintF("Unaligned unsigned halfword read at 0x%08x, pc=%p\n", addr, instr); 926 PrintF("Unaligned unsigned halfword read at 0x%08x, pc=%p\n", addr, instr);
906 UNIMPLEMENTED(); 927 UNIMPLEMENTED();
907 return 0; 928 return 0;
929 #endif
908 } 930 }
909 931
910 932
911 int16_t Simulator::ReadH(int32_t addr, Instr* instr) { 933 int16_t Simulator::ReadH(int32_t addr, Instr* instr) {
934 #if V8_TARGET_CAN_READ_UNALIGNED
935 int16_t* ptr = reinterpret_cast<int16_t*>(addr);
936 return *ptr;
937 #else
912 if ((addr & 1) == 0) { 938 if ((addr & 1) == 0) {
913 int16_t* ptr = reinterpret_cast<int16_t*>(addr); 939 int16_t* ptr = reinterpret_cast<int16_t*>(addr);
914 return *ptr; 940 return *ptr;
915 } 941 }
916 PrintF("Unaligned signed halfword read at 0x%08x\n", addr); 942 PrintF("Unaligned signed halfword read at 0x%08x\n", addr);
917 UNIMPLEMENTED(); 943 UNIMPLEMENTED();
918 return 0; 944 return 0;
945 #endif
919 } 946 }
920 947
921 948
922 void Simulator::WriteH(int32_t addr, uint16_t value, Instr* instr) { 949 void Simulator::WriteH(int32_t addr, uint16_t value, Instr* instr) {
950 #if V8_TARGET_CAN_READ_UNALIGNED
951 uint16_t* ptr = reinterpret_cast<uint16_t*>(addr);
952 *ptr = value;
953 return;
954 #else
923 if ((addr & 1) == 0) { 955 if ((addr & 1) == 0) {
924 uint16_t* ptr = reinterpret_cast<uint16_t*>(addr); 956 uint16_t* ptr = reinterpret_cast<uint16_t*>(addr);
925 *ptr = value; 957 *ptr = value;
926 return; 958 return;
927 } 959 }
928 PrintF("Unaligned unsigned halfword write at 0x%08x, pc=%p\n", addr, instr); 960 PrintF("Unaligned unsigned halfword write at 0x%08x, pc=%p\n", addr, instr);
929 UNIMPLEMENTED(); 961 UNIMPLEMENTED();
962 #endif
930 } 963 }
931 964
932 965
933 void Simulator::WriteH(int32_t addr, int16_t value, Instr* instr) { 966 void Simulator::WriteH(int32_t addr, int16_t value, Instr* instr) {
967 #if V8_TARGET_CAN_READ_UNALIGNED
968 int16_t* ptr = reinterpret_cast<int16_t*>(addr);
969 *ptr = value;
970 return;
971 #else
934 if ((addr & 1) == 0) { 972 if ((addr & 1) == 0) {
935 int16_t* ptr = reinterpret_cast<int16_t*>(addr); 973 int16_t* ptr = reinterpret_cast<int16_t*>(addr);
936 *ptr = value; 974 *ptr = value;
937 return; 975 return;
938 } 976 }
939 PrintF("Unaligned halfword write at 0x%08x, pc=%p\n", addr, instr); 977 PrintF("Unaligned halfword write at 0x%08x, pc=%p\n", addr, instr);
940 UNIMPLEMENTED(); 978 UNIMPLEMENTED();
979 #endif
941 } 980 }
942 981
943 982
944 uint8_t Simulator::ReadBU(int32_t addr) { 983 uint8_t Simulator::ReadBU(int32_t addr) {
945 uint8_t* ptr = reinterpret_cast<uint8_t*>(addr); 984 uint8_t* ptr = reinterpret_cast<uint8_t*>(addr);
946 return *ptr; 985 return *ptr;
947 } 986 }
948 987
949 988
950 int8_t Simulator::ReadB(int32_t addr) { 989 int8_t Simulator::ReadB(int32_t addr) {
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2632 int current_sp = get_register(sp); 2671 int current_sp = get_register(sp);
2633 uintptr_t* stack_slot = reinterpret_cast<uintptr_t*>(current_sp); 2672 uintptr_t* stack_slot = reinterpret_cast<uintptr_t*>(current_sp);
2634 uintptr_t address = *stack_slot; 2673 uintptr_t address = *stack_slot;
2635 set_register(sp, current_sp + sizeof(uintptr_t)); 2674 set_register(sp, current_sp + sizeof(uintptr_t));
2636 return address; 2675 return address;
2637 } 2676 }
2638 2677
2639 } } // namespace assembler::arm 2678 } } // namespace assembler::arm
2640 2679
2641 #endif // __arm__ 2680 #endif // __arm__
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